ice: Always clear QRXFLXP_CNTXT before writing new value
Always clear the previous value in QRXFLXP_CNTXT before writing a new value. This will make it so re-used queues will not accidentally take the previously configured settings. Signed-off-by: Brett Creeley <brett.creeley@intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
This commit is contained in:

committed by
Jeff Kirsher

parent
cf0bf41dd6
commit
401ce33b32
@@ -3,6 +3,7 @@
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#include <net/xdp_sock_drv.h>
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#include "ice_base.h"
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#include "ice_lib.h"
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#include "ice_dcb_lib.h"
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/**
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@@ -288,7 +289,6 @@ int ice_setup_rx_ctx(struct ice_ring *ring)
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u32 rxdid = ICE_RXDID_FLEX_NIC;
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struct ice_rlan_ctx rlan_ctx;
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struct ice_hw *hw;
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u32 regval;
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u16 pf_q;
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int err;
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@@ -385,27 +385,16 @@ int ice_setup_rx_ctx(struct ice_ring *ring)
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/* Rx queue threshold in units of 64 */
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rlan_ctx.lrxqthresh = 1;
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/* Enable Flexible Descriptors in the queue context which
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* allows this driver to select a specific receive descriptor format
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*/
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regval = rd32(hw, QRXFLXP_CNTXT(pf_q));
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if (vsi->type != ICE_VSI_VF) {
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regval |= (rxdid << QRXFLXP_CNTXT_RXDID_IDX_S) &
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QRXFLXP_CNTXT_RXDID_IDX_M;
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/* increasing context priority to pick up profile ID;
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* default is 0x01; setting to 0x03 to ensure profile
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* is programming if prev context is of same priority
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*/
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regval |= (0x03 << QRXFLXP_CNTXT_RXDID_PRIO_S) &
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QRXFLXP_CNTXT_RXDID_PRIO_M;
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} else {
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regval &= ~(QRXFLXP_CNTXT_RXDID_IDX_M |
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QRXFLXP_CNTXT_RXDID_PRIO_M |
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QRXFLXP_CNTXT_TS_M);
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}
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wr32(hw, QRXFLXP_CNTXT(pf_q), regval);
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/* Enable Flexible Descriptors in the queue context which
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* allows this driver to select a specific receive descriptor format
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* increasing context priority to pick up profile ID; default is 0x01;
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* setting to 0x03 to ensure profile is programming if prev context is
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* of same priority
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*/
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if (vsi->type != ICE_VSI_VF)
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ice_write_qrxflxp_cntxt(hw, pf_q, rxdid, 0x3);
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else
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ice_write_qrxflxp_cntxt(hw, pf_q, ICE_RXDID_LEGACY_1, 0x3);
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/* Absolute queue number out of 2K needs to be passed */
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err = ice_write_rxq_ctx(hw, &rlan_ctx, pf_q);
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@@ -1595,6 +1595,32 @@ void ice_vsi_cfg_frame_size(struct ice_vsi *vsi)
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}
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}
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/**
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* ice_write_qrxflxp_cntxt - write/configure QRXFLXP_CNTXT register
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* @hw: HW pointer
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* @pf_q: index of the Rx queue in the PF's queue space
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* @rxdid: flexible descriptor RXDID
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* @prio: priority for the RXDID for this queue
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*/
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void
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ice_write_qrxflxp_cntxt(struct ice_hw *hw, u16 pf_q, u32 rxdid, u32 prio)
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{
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int regval = rd32(hw, QRXFLXP_CNTXT(pf_q));
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/* clear any previous values */
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regval &= ~(QRXFLXP_CNTXT_RXDID_IDX_M |
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QRXFLXP_CNTXT_RXDID_PRIO_M |
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QRXFLXP_CNTXT_TS_M);
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regval |= (rxdid << QRXFLXP_CNTXT_RXDID_IDX_S) &
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QRXFLXP_CNTXT_RXDID_IDX_M;
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regval |= (prio << QRXFLXP_CNTXT_RXDID_PRIO_S) &
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QRXFLXP_CNTXT_RXDID_PRIO_M;
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wr32(hw, QRXFLXP_CNTXT(pf_q), regval);
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}
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/**
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* ice_vsi_cfg_rxqs - Configure the VSI for Rx
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* @vsi: the VSI being configured
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@@ -74,6 +74,9 @@ int ice_vsi_rebuild(struct ice_vsi *vsi, bool init_vsi);
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bool ice_is_reset_in_progress(unsigned long *state);
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void
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ice_write_qrxflxp_cntxt(struct ice_hw *hw, u16 pf_q, u32 rxdid, u32 prio);
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void ice_vsi_put_qs(struct ice_vsi *vsi);
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void ice_vsi_dis_irq(struct ice_vsi *vsi);
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