Merge branch 'linus' into x86/core
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@@ -18,11 +18,15 @@
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#define _EFER_LME 8 /* Long mode enable */
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#define _EFER_LMA 10 /* Long mode active (read-only) */
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#define _EFER_NX 11 /* No execute enable */
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#define _EFER_SVME 12 /* Enable virtualization */
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#define _EFER_FFXSR 14 /* Enable Fast FXSAVE/FXRSTOR */
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#define EFER_SCE (1<<_EFER_SCE)
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#define EFER_LME (1<<_EFER_LME)
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#define EFER_LMA (1<<_EFER_LMA)
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#define EFER_NX (1<<_EFER_NX)
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#define EFER_SVME (1<<_EFER_SVME)
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#define EFER_FFXSR (1<<_EFER_FFXSR)
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/* Intel MSRs. Some also available on other CPUs */
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#define MSR_IA32_PERFCTR0 0x000000c1
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@@ -365,4 +369,9 @@
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#define MSR_IA32_VMX_PROCBASED_CTLS2 0x0000048b
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#define MSR_IA32_VMX_EPT_VPID_CAP 0x0000048c
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/* AMD-V MSRs */
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#define MSR_VM_CR 0xc0010114
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#define MSR_VM_HSAVE_PA 0xc0010117
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#endif /* _ASM_X86_MSR_INDEX_H */
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