Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 fixes from Ingo Molnar: "Three fixes, a hw-enablement and a cross-arch fix/enablement change: - SGI/UV fix for older platforms - x32 signal handling fix - older x86 platform bootup APIC fix - AVX512-4VNNIW (Neural Network Instructions) and AVX512-4FMAPS (Multiply Accumulation Single precision instructions) enablement. - move thread_info back into x86 specific code, to make life easier for other architectures trying to make use of CONFIG_THREAD_INFO_IN_TASK_STRUCT=y" * 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/boot/smp: Don't try to poke disabled/non-existent APIC sched/core, x86: Make struct thread_info arch specific again x86/signal: Remove bogus user_64bit_mode() check from sigaction_compat_abi() x86/platform/UV: Fix support for EFI_OLD_MEMMAP after BIOS callback updates x86/cpufeature: Add AVX512_4VNNIW and AVX512_4FMAPS features x86/vmware: Skip timer_irq_works() check on VMware
Этот коммит содержится в:
@@ -32,6 +32,8 @@ void init_scattered_cpuid_features(struct cpuinfo_x86 *c)
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static const struct cpuid_bit cpuid_bits[] = {
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{ X86_FEATURE_INTEL_PT, CR_EBX,25, 0x00000007, 0 },
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{ X86_FEATURE_AVX512_4VNNIW, CR_EDX, 2, 0x00000007, 0 },
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{ X86_FEATURE_AVX512_4FMAPS, CR_EDX, 3, 0x00000007, 0 },
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{ X86_FEATURE_APERFMPERF, CR_ECX, 0, 0x00000006, 0 },
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{ X86_FEATURE_EPB, CR_ECX, 3, 0x00000006, 0 },
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{ X86_FEATURE_HW_PSTATE, CR_EDX, 7, 0x80000007, 0 },
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@@ -27,6 +27,7 @@
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#include <asm/div64.h>
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#include <asm/x86_init.h>
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#include <asm/hypervisor.h>
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#include <asm/timer.h>
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#include <asm/apic.h>
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#define CPUID_VMWARE_INFO_LEAF 0x40000000
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@@ -94,6 +95,10 @@ static void __init vmware_platform_setup(void)
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} else {
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pr_warn("Failed to get TSC freq from the hypervisor\n");
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}
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#ifdef CONFIG_X86_IO_APIC
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no_timer_check = 1;
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#endif
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}
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/*
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@@ -74,6 +74,8 @@ void fpu__xstate_clear_all_cpu_caps(void)
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setup_clear_cpu_cap(X86_FEATURE_MPX);
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setup_clear_cpu_cap(X86_FEATURE_XGETBV1);
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setup_clear_cpu_cap(X86_FEATURE_PKU);
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setup_clear_cpu_cap(X86_FEATURE_AVX512_4VNNIW);
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setup_clear_cpu_cap(X86_FEATURE_AVX512_4FMAPS);
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}
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/*
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@@ -105,9 +105,6 @@ void sigaction_compat_abi(struct k_sigaction *act, struct k_sigaction *oact)
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/* Don't let flags to be set from userspace */
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act->sa.sa_flags &= ~(SA_IA32_ABI | SA_X32_ABI);
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if (user_64bit_mode(current_pt_regs()))
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return;
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if (in_ia32_syscall())
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act->sa.sa_flags |= SA_IA32_ABI;
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if (in_x32_syscall())
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@@ -1409,15 +1409,17 @@ __init void prefill_possible_map(void)
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/* No boot processor was found in mptable or ACPI MADT */
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if (!num_processors) {
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int apicid = boot_cpu_physical_apicid;
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int cpu = hard_smp_processor_id();
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if (boot_cpu_has(X86_FEATURE_APIC)) {
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int apicid = boot_cpu_physical_apicid;
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int cpu = hard_smp_processor_id();
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pr_warn("Boot CPU (id %d) not listed by BIOS\n", cpu);
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pr_warn("Boot CPU (id %d) not listed by BIOS\n", cpu);
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/* Make sure boot cpu is enumerated */
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if (apic->cpu_present_to_apicid(0) == BAD_APICID &&
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apic->apic_id_valid(apicid))
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generic_processor_info(apicid, boot_cpu_apic_version);
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/* Make sure boot cpu is enumerated */
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if (apic->cpu_present_to_apicid(0) == BAD_APICID &&
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apic->apic_id_valid(apicid))
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generic_processor_info(apicid, boot_cpu_apic_version);
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}
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if (!num_processors)
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num_processors = 1;
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