Merge tag 'xtensa-20190715' of git://github.com/jcmvbkbc/linux-xtensa
Pull Xtensa updates from Max Filippov: - clean up PCI support code - add defconfig and DTS for the 'virt' board - abstract 'entry' and 'retw' uses in xtensa assembly in preparation for XEA3/NX pipeline support - random small cleanups * tag 'xtensa-20190715' of git://github.com/jcmvbkbc/linux-xtensa: xtensa: virt: add defconfig and DTS xtensa: abstract 'entry' and 'retw' in assembly code xtensa: One function call less in bootmem_init() xtensa: remove arch/xtensa/include/asm/types.h xtensa: use generic pcibios_set_master and pcibios_enable_device xtensa: drop dead PCI support code xtensa/PCI: Remove unused variable
This commit is contained in:
Linus Torvalds
@@ -121,7 +121,9 @@
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ENTRY(coprocessor_flush)
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entry a1, 32
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/* reserve 4 bytes on stack to save a0 */
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abi_entry(4)
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s32i a0, a1, 0
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movi a0, .Lsave_cp_regs_jump_table
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addx8 a3, a3, a0
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@@ -131,7 +133,8 @@ ENTRY(coprocessor_flush)
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beqz a3, 1f
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callx0 a3
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1: l32i a0, a1, 0
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retw
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abi_ret(4)
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ENDPROC(coprocessor_flush)
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@@ -1842,7 +1842,8 @@ ENDPROC(fast_store_prohibited)
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ENTRY(system_call)
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entry a1, 32
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/* reserve 4 bytes on stack for function parameter */
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abi_entry(4)
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/* regs->syscall = regs->areg[2] */
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@@ -1892,7 +1893,7 @@ ENTRY(system_call)
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s32i a6, a2, PT_AREG2
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bnez a3, 1f
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retw
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abi_ret(4)
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1:
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l32i a4, a1, 4
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@@ -1901,7 +1902,7 @@ ENTRY(system_call)
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mov a6, a2
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call4 do_syscall_trace_leave
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s32i a3, a2, PT_SYSCALL
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retw
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abi_ret(4)
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ENDPROC(system_call)
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@@ -1952,7 +1953,7 @@ ENDPROC(system_call)
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ENTRY(_switch_to)
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entry a1, 48
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abi_entry(XTENSA_SPILL_STACK_RESERVE)
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mov a11, a3 # and 'next' (a3)
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@@ -2013,7 +2014,7 @@ ENTRY(_switch_to)
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wsr a14, ps
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rsync
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retw
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abi_ret(XTENSA_SPILL_STACK_RESERVE)
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ENDPROC(_switch_to)
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@@ -11,6 +11,7 @@
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*/
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#include <linux/linkage.h>
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#include <asm/asmmacro.h>
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#include <asm/ftrace.h>
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/*
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@@ -21,13 +22,13 @@
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ENTRY(_mcount)
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entry a1, 16
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abi_entry_default
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movi a4, ftrace_trace_function
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l32i a4, a4, 0
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movi a3, ftrace_stub
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bne a3, a4, 1f
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retw
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abi_ret_default
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1: xor a7, a2, a1
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movi a3, 0x3fffffff
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@@ -40,11 +41,11 @@ ENTRY(_mcount)
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addi a6, a6, -MCOUNT_INSN_SIZE
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callx4 a4
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retw
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abi_ret_default
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ENDPROC(_mcount)
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ENTRY(ftrace_stub)
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entry a1, 16
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retw
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abi_entry_default
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abi_ret_default
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ENDPROC(ftrace_stub)
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@@ -24,23 +24,6 @@
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#include <asm/pci-bridge.h>
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#include <asm/platform.h>
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/* PCI Controller */
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/*
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* pcibios_alloc_controller
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* pcibios_enable_device
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* pcibios_fixups
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* pcibios_align_resource
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* pcibios_fixup_bus
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* pci_bus_add_device
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*/
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static struct pci_controller *pci_ctrl_head;
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static struct pci_controller **pci_ctrl_tail = &pci_ctrl_head;
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static int pci_bus_count;
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/*
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* We need to avoid collisions with `mirrored' VGA ports
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* and other strange ISA hardware, so we always want the
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@@ -75,81 +58,6 @@ pcibios_align_resource(void *data, const struct resource *res,
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return start;
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}
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static void __init pci_controller_apertures(struct pci_controller *pci_ctrl,
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struct list_head *resources)
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{
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struct resource *res;
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unsigned long io_offset;
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int i;
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io_offset = (unsigned long)pci_ctrl->io_space.base;
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res = &pci_ctrl->io_resource;
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if (!res->flags) {
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if (io_offset)
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pr_err("I/O resource not set for host bridge %d\n",
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pci_ctrl->index);
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res->start = 0;
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res->end = IO_SPACE_LIMIT;
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res->flags = IORESOURCE_IO;
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}
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res->start += io_offset;
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res->end += io_offset;
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pci_add_resource_offset(resources, res, io_offset);
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for (i = 0; i < 3; i++) {
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res = &pci_ctrl->mem_resources[i];
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if (!res->flags) {
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if (i > 0)
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continue;
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pr_err("Memory resource not set for host bridge %d\n",
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pci_ctrl->index);
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res->start = 0;
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res->end = ~0U;
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res->flags = IORESOURCE_MEM;
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}
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pci_add_resource(resources, res);
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}
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}
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static int __init pcibios_init(void)
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{
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struct pci_controller *pci_ctrl;
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struct list_head resources;
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struct pci_bus *bus;
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int next_busno = 0, ret;
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pr_info("PCI: Probing PCI hardware\n");
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/* Scan all of the recorded PCI controllers. */
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for (pci_ctrl = pci_ctrl_head; pci_ctrl; pci_ctrl = pci_ctrl->next) {
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pci_ctrl->last_busno = 0xff;
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INIT_LIST_HEAD(&resources);
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pci_controller_apertures(pci_ctrl, &resources);
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bus = pci_scan_root_bus(NULL, pci_ctrl->first_busno,
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pci_ctrl->ops, pci_ctrl, &resources);
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if (!bus)
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continue;
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pci_ctrl->bus = bus;
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pci_ctrl->last_busno = bus->busn_res.end;
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if (next_busno <= pci_ctrl->last_busno)
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next_busno = pci_ctrl->last_busno+1;
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}
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pci_bus_count = next_busno;
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ret = platform_pcibios_fixup();
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if (ret)
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return ret;
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for (pci_ctrl = pci_ctrl_head; pci_ctrl; pci_ctrl = pci_ctrl->next) {
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if (pci_ctrl->bus)
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pci_bus_add_devices(pci_ctrl->bus);
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}
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return 0;
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}
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subsys_initcall(pcibios_init);
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void pcibios_fixup_bus(struct pci_bus *bus)
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{
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if (bus->parent) {
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@@ -158,38 +66,6 @@ void pcibios_fixup_bus(struct pci_bus *bus)
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}
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}
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void pcibios_set_master(struct pci_dev *dev)
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{
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/* No special bus mastering setup handling */
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}
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int pcibios_enable_device(struct pci_dev *dev, int mask)
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{
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u16 cmd, old_cmd;
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int idx;
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struct resource *r;
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pci_read_config_word(dev, PCI_COMMAND, &cmd);
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old_cmd = cmd;
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for (idx=0; idx<6; idx++) {
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r = &dev->resource[idx];
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if (!r->start && r->end) {
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pci_err(dev, "can't enable device: resource collisions\n");
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return -EINVAL;
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}
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if (r->flags & IORESOURCE_IO)
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cmd |= PCI_COMMAND_IO;
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if (r->flags & IORESOURCE_MEM)
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cmd |= PCI_COMMAND_MEMORY;
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}
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if (cmd != old_cmd) {
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pci_info(dev, "enabling device (%04x -> %04x)\n", old_cmd, cmd);
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pci_write_config_word(dev, PCI_COMMAND, cmd);
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}
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return 0;
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}
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/*
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* Platform support for /proc/bus/pci/X/Y mmap()s.
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* -- paulus.
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@@ -34,8 +34,6 @@ _F(void, halt, (void), { while(1); });
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_F(void, power_off, (void), { while(1); });
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_F(void, idle, (void), { __asm__ __volatile__ ("waiti 0" ::: "memory"); });
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_F(void, heartbeat, (void), { });
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_F(int, pcibios_fixup, (void), { return 0; });
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_F(void, pcibios_init, (void), { });
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#ifdef CONFIG_XTENSA_CALIBRATE_CCOUNT
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_F(void, calibrate_ccount, (void),
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@@ -405,10 +405,6 @@ void __init setup_arch(char **cmdline_p)
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conswitchp = &dummy_con;
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# endif
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#endif
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#ifdef CONFIG_PCI
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platform_pcibios_init();
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#endif
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}
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static DEFINE_PER_CPU(struct cpu, cpu_data);
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