Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linux
Pull drm updates from Dave Airlie:
"I Was Almost Tempted To Capitalise Every Word, but then I decided I
couldn't read it myself!
I've also got one pull request for the sti driver outstanding. It
relied on a commit in Greg's tree and I didn't find out in time, that
commit is in your tree now so I might send that along once this is
merged.
I also had the accidental misfortune to have access to a Skylake on my
desk for a few days, and I've had to encourage Intel to try harder,
which seems to be happening now.
Here is the main drm-next pull request for 4.4.
Highlights:
New driver:
vc4 driver for the Rasberry Pi VPU.
(From Eric Anholt at Broadcom.)
Core:
Atomic fbdev support
Atomic helpers for runtime pm
dp/aux i2c STATUS_UPDATE handling
struct_mutex usage cleanups.
Generic of probing support.
Documentation:
Kerneldoc for VGA switcheroo code.
Rename to gpu instead of drm to reflect scope.
i915:
Skylake GuC firmware fixes
HPD A support
VBT backlight fallbacks
Fastboot by default for some systems
FBC work
BXT/SKL workarounds
Skylake deeper sleep state fixes
amdgpu:
Enable GPU scheduler by default
New atombios opcodes
GPUVM debugging options
Stoney support.
Fencing cleanups.
radeon:
More efficient CS checking
nouveau:
gk20a instance memory handling improvements.
Improved PGOB detection and GK107 support
Kepler GDDR5 PLL statbility improvement
G8x/GT2xx reclock improvements
new userspace API compatiblity fixes.
virtio-gpu:
Add 3D support - qemu 2.5 has it merged for it's gtk backend.
msm:
Initial msm88896 (snapdragon 8200)
exynos:
HDMI cleanups
Enable mixer driver byt default
Add DECON-TV support
vmwgfx:
Move to using memremap + fixes.
rcar-du:
Add support for R8A7793/4 DU
armada:
Remove support for non-component mode
Improved plane handling
Power savings while in DPMS off.
tda998x:
Remove unused slave encoder support
Use more HDMI helpers
Fix EDID read handling
dwhdmi:
Interlace video mode support for ipu-v3/dw_hdmi
Hotplug state fixes
Audio driver integration
imx:
More color formats support.
tegra:
Minor fixes/improvements"
[ Merge fixup: remove unused variable 'dev' that had all uses removed in
commit 4e270f0880
: "drm/gem: Drop struct_mutex requirement from
drm_gem_mmap_obj" ]
* 'drm-next' of git://people.freedesktop.org/~airlied/linux: (764 commits)
drm/vmwgfx: Relax irq locking somewhat
drm/vmwgfx: Properly flush cursor updates and page-flips
drm/i915/skl: disable display side power well support for now
drm/i915: Extend DSL readout fix to BDW and SKL.
drm/i915: Do graphics device reset under forcewake
drm/i915: Skip fence installation for objects with rotated views (v4)
vga_switcheroo: Drop client power state VGA_SWITCHEROO_INIT
drm/amdgpu: group together common fence implementation
drm/amdgpu: remove AMDGPU_FENCE_OWNER_MOVE
drm/amdgpu: remove now unused fence functions
drm/amdgpu: fix fence fallback check
drm/amdgpu: fix stoping the scheduler timeout
drm/amdgpu: cleanup on error in amdgpu_cs_ioctl()
drm/i915: Fix locking around GuC firmware load
drm/amdgpu: update Fiji's Golden setting
drm/amdgpu: update Fiji's rev id
drm/amdgpu: extract common code in vi_common_early_init
drm/amd/scheduler: don't oops on failure to load
drm/amdgpu: don't oops on failure to load (v2)
drm/amdgpu: don't VT switch on suspend
...
This commit is contained in:
@@ -79,6 +79,8 @@ extern int amdgpu_bapm;
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extern int amdgpu_deep_color;
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extern int amdgpu_vm_size;
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extern int amdgpu_vm_block_size;
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extern int amdgpu_vm_fault_stop;
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extern int amdgpu_vm_debug;
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extern int amdgpu_enable_scheduler;
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extern int amdgpu_sched_jobs;
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extern int amdgpu_sched_hw_submission;
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@@ -343,7 +345,6 @@ struct amdgpu_ring_funcs {
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/* testing functions */
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int (*test_ring)(struct amdgpu_ring *ring);
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int (*test_ib)(struct amdgpu_ring *ring);
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bool (*is_lockup)(struct amdgpu_ring *ring);
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/* insert NOP packets */
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void (*insert_nop)(struct amdgpu_ring *ring, uint32_t count);
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};
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@@ -404,7 +405,6 @@ struct amdgpu_fence_driver {
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/* some special values for the owner field */
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#define AMDGPU_FENCE_OWNER_UNDEFINED ((void*)0ul)
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#define AMDGPU_FENCE_OWNER_VM ((void*)1ul)
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#define AMDGPU_FENCE_OWNER_MOVE ((void*)2ul)
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#define AMDGPU_FENCE_FLAG_64BIT (1 << 0)
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#define AMDGPU_FENCE_FLAG_INT (1 << 1)
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@@ -446,58 +446,11 @@ int amdgpu_fence_wait_next(struct amdgpu_ring *ring);
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int amdgpu_fence_wait_empty(struct amdgpu_ring *ring);
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unsigned amdgpu_fence_count_emitted(struct amdgpu_ring *ring);
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signed long amdgpu_fence_wait_any(struct amdgpu_device *adev,
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struct fence **array,
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uint32_t count,
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bool intr,
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signed long t);
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struct amdgpu_fence *amdgpu_fence_ref(struct amdgpu_fence *fence);
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void amdgpu_fence_unref(struct amdgpu_fence **fence);
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bool amdgpu_fence_need_sync(struct amdgpu_fence *fence,
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struct amdgpu_ring *ring);
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void amdgpu_fence_note_sync(struct amdgpu_fence *fence,
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struct amdgpu_ring *ring);
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static inline struct amdgpu_fence *amdgpu_fence_later(struct amdgpu_fence *a,
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struct amdgpu_fence *b)
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{
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if (!a) {
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return b;
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}
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if (!b) {
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return a;
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}
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BUG_ON(a->ring != b->ring);
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if (a->seq > b->seq) {
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return a;
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} else {
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return b;
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}
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}
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static inline bool amdgpu_fence_is_earlier(struct amdgpu_fence *a,
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struct amdgpu_fence *b)
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{
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if (!a) {
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return false;
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}
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if (!b) {
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return true;
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}
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BUG_ON(a->ring != b->ring);
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return a->seq < b->seq;
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}
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int amdgpu_user_fence_emit(struct amdgpu_ring *ring, struct amdgpu_user_fence *user,
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void *owner, struct amdgpu_fence **fence);
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/*
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* TTM.
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*/
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@@ -708,7 +661,7 @@ void amdgpu_semaphore_free(struct amdgpu_device *adev,
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*/
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struct amdgpu_sync {
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struct amdgpu_semaphore *semaphores[AMDGPU_NUM_SYNCS];
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struct amdgpu_fence *sync_to[AMDGPU_MAX_RINGS];
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struct fence *sync_to[AMDGPU_MAX_RINGS];
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DECLARE_HASHTABLE(fences, 4);
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struct fence *last_vm_update;
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};
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@@ -905,8 +858,6 @@ struct amdgpu_ring {
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unsigned ring_size;
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unsigned ring_free_dw;
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int count_dw;
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atomic_t last_rptr;
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atomic64_t last_activity;
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uint64_t gpu_addr;
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uint32_t align_mask;
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uint32_t ptr_mask;
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@@ -960,6 +911,11 @@ struct amdgpu_ring {
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#define AMDGPU_PTE_FRAG_64KB (4 << 7)
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#define AMDGPU_LOG2_PAGES_PER_FRAG 4
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/* How to programm VM fault handling */
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#define AMDGPU_VM_FAULT_STOP_NEVER 0
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#define AMDGPU_VM_FAULT_STOP_FIRST 1
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#define AMDGPU_VM_FAULT_STOP_ALWAYS 2
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struct amdgpu_vm_pt {
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struct amdgpu_bo *bo;
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uint64_t addr;
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@@ -971,7 +927,7 @@ struct amdgpu_vm_id {
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/* last flushed PD/PT update */
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struct fence *flushed_updates;
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/* last use of vmid */
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struct amdgpu_fence *last_id_use;
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struct fence *last_id_use;
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};
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struct amdgpu_vm {
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@@ -1004,7 +960,7 @@ struct amdgpu_vm {
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};
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struct amdgpu_vm_manager {
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struct amdgpu_fence *active[AMDGPU_NUM_VM];
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struct fence *active[AMDGPU_NUM_VM];
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uint32_t max_pfn;
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/* number of VMIDs */
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unsigned nvm;
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@@ -1223,8 +1179,6 @@ void amdgpu_ring_commit(struct amdgpu_ring *ring);
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void amdgpu_ring_unlock_commit(struct amdgpu_ring *ring);
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void amdgpu_ring_undo(struct amdgpu_ring *ring);
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void amdgpu_ring_unlock_undo(struct amdgpu_ring *ring);
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void amdgpu_ring_lockup_update(struct amdgpu_ring *ring);
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bool amdgpu_ring_test_lockup(struct amdgpu_ring *ring);
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unsigned amdgpu_ring_backup(struct amdgpu_ring *ring,
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uint32_t **data);
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int amdgpu_ring_restore(struct amdgpu_ring *ring,
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@@ -1234,6 +1188,7 @@ int amdgpu_ring_init(struct amdgpu_device *adev, struct amdgpu_ring *ring,
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struct amdgpu_irq_src *irq_src, unsigned irq_type,
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enum amdgpu_ring_type ring_type);
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void amdgpu_ring_fini(struct amdgpu_ring *ring);
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struct amdgpu_ring *amdgpu_ring_from_fence(struct fence *f);
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/*
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* CS.
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@@ -1709,7 +1664,7 @@ struct amdgpu_vce {
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/*
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* SDMA
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*/
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struct amdgpu_sdma {
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struct amdgpu_sdma_instance {
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/* SDMA firmware */
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const struct firmware *fw;
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uint32_t fw_version;
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@@ -1719,6 +1674,13 @@ struct amdgpu_sdma {
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bool burst_nop;
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};
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struct amdgpu_sdma {
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struct amdgpu_sdma_instance instance[AMDGPU_MAX_SDMA_INSTANCES];
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struct amdgpu_irq_src trap_irq;
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struct amdgpu_irq_src illegal_inst_irq;
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int num_instances;
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};
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/*
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* Firmware
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*/
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@@ -1751,11 +1713,11 @@ void amdgpu_test_syncing(struct amdgpu_device *adev);
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int amdgpu_mn_register(struct amdgpu_bo *bo, unsigned long addr);
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void amdgpu_mn_unregister(struct amdgpu_bo *bo);
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#else
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static int amdgpu_mn_register(struct amdgpu_bo *bo, unsigned long addr)
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static inline int amdgpu_mn_register(struct amdgpu_bo *bo, unsigned long addr)
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{
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return -ENODEV;
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}
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static void amdgpu_mn_unregister(struct amdgpu_bo *bo) {}
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static inline void amdgpu_mn_unregister(struct amdgpu_bo *bo) {}
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#endif
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/*
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@@ -1947,7 +1909,6 @@ struct amdgpu_device {
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struct device *dev;
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struct drm_device *ddev;
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struct pci_dev *pdev;
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struct rw_semaphore exclusive_lock;
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/* ASIC */
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enum amd_asic_type asic_type;
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@@ -1961,7 +1922,6 @@ struct amdgpu_device {
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bool suspend;
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bool need_dma32;
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bool accel_working;
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bool needs_reset;
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struct work_struct reset_work;
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struct notifier_block acpi_nb;
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struct amdgpu_i2c_chan *i2c_bus[AMDGPU_MAX_I2C_BUS];
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@@ -2065,9 +2025,7 @@ struct amdgpu_device {
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struct amdgpu_gfx gfx;
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/* sdma */
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struct amdgpu_sdma sdma[AMDGPU_MAX_SDMA_INSTANCES];
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struct amdgpu_irq_src sdma_trap_irq;
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struct amdgpu_irq_src sdma_illegal_inst_irq;
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struct amdgpu_sdma sdma;
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/* uvd */
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bool has_uvd;
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@@ -2204,17 +2162,18 @@ static inline void amdgpu_ring_write(struct amdgpu_ring *ring, uint32_t v)
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ring->ring_free_dw--;
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}
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static inline struct amdgpu_sdma * amdgpu_get_sdma_instance(struct amdgpu_ring *ring)
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static inline struct amdgpu_sdma_instance *
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amdgpu_get_sdma_instance(struct amdgpu_ring *ring)
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{
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struct amdgpu_device *adev = ring->adev;
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int i;
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for (i = 0; i < AMDGPU_MAX_SDMA_INSTANCES; i++)
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if (&adev->sdma[i].ring == ring)
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for (i = 0; i < adev->sdma.num_instances; i++)
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if (&adev->sdma.instance[i].ring == ring)
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break;
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if (i < AMDGPU_MAX_SDMA_INSTANCES)
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return &adev->sdma[i];
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return &adev->sdma.instance[i];
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else
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return NULL;
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}
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@@ -2241,7 +2200,6 @@ static inline struct amdgpu_sdma * amdgpu_get_sdma_instance(struct amdgpu_ring *
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#define amdgpu_ring_parse_cs(r, p, ib) ((r)->funcs->parse_cs((p), (ib)))
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#define amdgpu_ring_test_ring(r) (r)->funcs->test_ring((r))
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#define amdgpu_ring_test_ib(r) (r)->funcs->test_ib((r))
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#define amdgpu_ring_is_lockup(r) (r)->funcs->is_lockup((r))
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#define amdgpu_ring_get_rptr(r) (r)->funcs->get_rptr((r))
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#define amdgpu_ring_get_wptr(r) (r)->funcs->get_wptr((r))
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#define amdgpu_ring_set_wptr(r) (r)->funcs->set_wptr((r))
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@@ -2350,10 +2308,10 @@ void amdgpu_driver_preclose_kms(struct drm_device *dev,
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struct drm_file *file_priv);
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int amdgpu_suspend_kms(struct drm_device *dev, bool suspend, bool fbcon);
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int amdgpu_resume_kms(struct drm_device *dev, bool resume, bool fbcon);
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u32 amdgpu_get_vblank_counter_kms(struct drm_device *dev, int crtc);
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int amdgpu_enable_vblank_kms(struct drm_device *dev, int crtc);
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void amdgpu_disable_vblank_kms(struct drm_device *dev, int crtc);
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int amdgpu_get_vblank_timestamp_kms(struct drm_device *dev, int crtc,
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u32 amdgpu_get_vblank_counter_kms(struct drm_device *dev, unsigned int pipe);
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int amdgpu_enable_vblank_kms(struct drm_device *dev, unsigned int pipe);
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void amdgpu_disable_vblank_kms(struct drm_device *dev, unsigned int pipe);
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int amdgpu_get_vblank_timestamp_kms(struct drm_device *dev, unsigned int pipe,
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int *max_error,
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struct timeval *vblank_time,
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unsigned flags);
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