clocksource/drivers/hyperv: Enable TSC page clocksource on 32bit
There is no particular reason to not enable TSC page clocksource on 32-bit. mul_u64_u64_shr() is available and despite the increased computational complexity (compared to 64bit) TSC page is still a huge win compared to MSR-based clocksource. In-kernel reads: MSR based clocksource: 3361 cycles TSC page clocksource: 49 cycles Reads from userspace (utilizing vDSO in case of TSC page): MSR based clocksource: 5664 cycles TSC page clocksource: 131 cycles Enabling TSC page on 32bits allows to get rid of CONFIG_HYPERV_TSCPAGE as it is now not any different from CONFIG_HYPERV_TIMER. Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Michael Kelley <mikelley@microsoft.com> Link: https://lkml.kernel.org/r/20190822083630.17059-1-vkuznets@redhat.com
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committed by
Thomas Gleixner

parent
bd00cd52d5
commit
3e2d94535a
@@ -51,7 +51,7 @@ extern struct pvclock_vsyscall_time_info pvclock_page
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__attribute__((visibility("hidden")));
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#endif
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#ifdef CONFIG_HYPERV_TSCPAGE
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#ifdef CONFIG_HYPERV_TIMER
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extern struct ms_hyperv_tsc_page hvclock_page
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__attribute__((visibility("hidden")));
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#endif
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@@ -192,7 +192,7 @@ static u64 vread_pvclock(void)
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}
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#endif
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#ifdef CONFIG_HYPERV_TSCPAGE
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#ifdef CONFIG_HYPERV_TIMER
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static u64 vread_hvclock(void)
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{
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return hv_read_tsc_page(&hvclock_page);
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@@ -215,7 +215,7 @@ static inline u64 __arch_get_hw_counter(s32 clock_mode)
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return vread_pvclock();
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}
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#endif
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#ifdef CONFIG_HYPERV_TSCPAGE
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#ifdef CONFIG_HYPERV_TIMER
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if (clock_mode == VCLOCK_HVCLOCK) {
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barrier();
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return vread_hvclock();
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