Merge tag 'pinctrl-for-v3.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control changes from Linus Walleij: - A large slew of improvements of the Genric pin configuration support, and deployment in four different platforms: Rockchip, Super-H PFC, ABx500 and TZ1090. Support BIAS_BUS_HOLD, get device tree parsing and debugfs support into shape. - We also have device tree support with generic naming conventions for the generic pin configuration. - Delete the unused and confusing direct pinconf API. Now state transitions is *the* way to control pins and multiplexing. - New drivers for Rockchip, TZ1090, and TZ1090 PDC. - Two pin control states related to power management are now handled in the device core: "sleep" and "idle", removing a lot of boilerplate code in drivers. We do not yet know if this is the final word for pin PM, but it already make things a lot easier to handle. - Handle sparse GPIO ranges passing a list of disparate pins, and utilize these in the new BayTrail (x86 Atom SoC) driver. - Make the sunxi (AllWinner) driver handle external interrupts. - Make it possible for pinctrl-single to handle the case where several pins are managed by a single register, and augment it to handle sleep modes. - Cleanups and improvements for the abx500 drivers. - Move Sirf pin control drivers to their own directory, support save/restore of context and add support for the SiRFatlas6 SoC. - PMU muxing for the Dove pinctrl driver. - Finalization and support for VF610 in the i.MX6 pinctrl driver. - Smoothen out various Exynos rough edges. - Generic cleanups of various kinds. * tag 'pinctrl-for-v3.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (82 commits) pinctrl: vt8500: wmt: remove redundant dev_err call in wmt_pinctrl_probe() pinctrl: remove bindings for pinconf options needing more thought pinctrl: remove slew-rate parameter from tz1090 pinctrl: set unit for debounce time pinconfig to usec pinctrl: more clarifications for generic pull configs pinctrl: rip out the direct pinconf API pinctrl-tz1090-pdc: add TZ1090 PDC pinctrl driver pinctrl-tz1090: add TZ1090 pinctrl driver pinctrl: samsung: Staticize drvdata_list pinctrl: rockchip: Add missing irq_gc_unlock() call before return error pinctrl: abx500: rework error path pinctrl: abx500: suppress hardcoded value pinctrl: abx500: factorize code pinctrl: abx500: fix abx500_gpio_get() pinctrl: abx500: fix abx500_pin_config_set() pinctrl: abx500: Add device tree support sh-pfc: Guard DT parsing with #ifdef CONFIG_OF pinctrl: add Intel BayTrail GPIO/pinctrl support pinctrl: fix pinconf_ops::pin_config_dbg_parse_modify kerneldoc pinctrl: Staticize local symbols ... Conflicts: drivers/net/ethernet/ti/davinci_mdio.c drivers/pinctrl/Makefile
Cette révision appartient à :
@@ -150,10 +150,6 @@ struct pl011_dmatx_data {
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struct uart_amba_port {
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struct uart_port port;
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struct clk *clk;
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/* Two optional pin states - default & sleep */
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struct pinctrl *pinctrl;
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struct pinctrl_state *pins_default;
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struct pinctrl_state *pins_sleep;
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const struct vendor_data *vendor;
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unsigned int dmacr; /* dma control reg */
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unsigned int im; /* interrupt mask */
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@@ -1479,12 +1475,7 @@ static int pl011_hwinit(struct uart_port *port)
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int retval;
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/* Optionaly enable pins to be muxed in and configured */
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if (!IS_ERR(uap->pins_default)) {
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retval = pinctrl_select_state(uap->pinctrl, uap->pins_default);
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if (retval)
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dev_err(port->dev,
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"could not set default pins\n");
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}
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pinctrl_pm_select_default_state(port->dev);
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/*
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* Try to enable the clock producer.
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@@ -1610,7 +1601,6 @@ static void pl011_shutdown(struct uart_port *port)
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{
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struct uart_amba_port *uap = (struct uart_amba_port *)port;
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unsigned int cr;
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int retval;
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/*
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* disable all interrupts
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@@ -1653,13 +1643,7 @@ static void pl011_shutdown(struct uart_port *port)
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*/
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clk_disable_unprepare(uap->clk);
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/* Optionally let pins go into sleep states */
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if (!IS_ERR(uap->pins_sleep)) {
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retval = pinctrl_select_state(uap->pinctrl, uap->pins_sleep);
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if (retval)
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dev_err(port->dev,
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"could not set pins to sleep state\n");
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}
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pinctrl_pm_select_sleep_state(port->dev);
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if (uap->port.dev->platform_data) {
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struct amba_pl011_data *plat;
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@@ -2012,12 +1996,7 @@ static int __init pl011_console_setup(struct console *co, char *options)
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return -ENODEV;
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/* Allow pins to be muxed in and configured */
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if (!IS_ERR(uap->pins_default)) {
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ret = pinctrl_select_state(uap->pinctrl, uap->pins_default);
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if (ret)
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dev_err(uap->port.dev,
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"could not set default pins\n");
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}
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pinctrl_pm_select_default_state(uap->port.dev);
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ret = clk_prepare(uap->clk);
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if (ret)
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@@ -2131,21 +2110,6 @@ static int pl011_probe(struct amba_device *dev, const struct amba_id *id)
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goto out;
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}
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uap->pinctrl = devm_pinctrl_get(&dev->dev);
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if (IS_ERR(uap->pinctrl)) {
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ret = PTR_ERR(uap->pinctrl);
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goto out;
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}
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uap->pins_default = pinctrl_lookup_state(uap->pinctrl,
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PINCTRL_STATE_DEFAULT);
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if (IS_ERR(uap->pins_default))
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dev_err(&dev->dev, "could not get default pinstate\n");
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uap->pins_sleep = pinctrl_lookup_state(uap->pinctrl,
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PINCTRL_STATE_SLEEP);
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if (IS_ERR(uap->pins_sleep))
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dev_dbg(&dev->dev, "could not get sleep pinstate\n");
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uap->clk = devm_clk_get(&dev->dev, NULL);
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if (IS_ERR(uap->clk)) {
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ret = PTR_ERR(uap->clk);
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