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Merge tag 'pinctrl-for-v3.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Browse Source 
Pull pin control changes from Linus Walleij:

 - A large slew of improvements of the Genric pin configuration support,
   and deployment in four different platforms: Rockchip, Super-H PFC,
   ABx500 and TZ1090.  Support BIAS_BUS_HOLD, get device tree parsing
   and debugfs support into shape.

 - We also have device tree support with generic naming conventions for
   the generic pin configuration.

 - Delete the unused and confusing direct pinconf API.  Now state
   transitions is *the* way to control pins and multiplexing.

 - New drivers for Rockchip, TZ1090, and TZ1090 PDC.

 - Two pin control states related to power management are now handled in
   the device core: "sleep" and "idle", removing a lot of boilerplate
   code in drivers.  We do not yet know if this is the final word for
   pin PM, but it already make things a lot easier to handle.

 - Handle sparse GPIO ranges passing a list of disparate pins, and
   utilize these in the new BayTrail (x86 Atom SoC) driver.

 - Make the sunxi (AllWinner) driver handle external interrupts.

 - Make it possible for pinctrl-single to handle the case where several
   pins are managed by a single register, and augment it to handle sleep
   modes.

 - Cleanups and improvements for the abx500 drivers.

 - Move Sirf pin control drivers to their own directory, support
   save/restore of context and add support for the SiRFatlas6 SoC.

 - PMU muxing for the Dove pinctrl driver.

 - Finalization and support for VF610 in the i.MX6 pinctrl driver.

 - Smoothen out various Exynos rough edges.

 - Generic cleanups of various kinds.

* tag 'pinctrl-for-v3.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (82 commits)
  pinctrl: vt8500: wmt: remove redundant dev_err call in wmt_pinctrl_probe()
  pinctrl: remove bindings for pinconf options needing more thought
  pinctrl: remove slew-rate parameter from tz1090
  pinctrl: set unit for debounce time pinconfig to usec
  pinctrl: more clarifications for generic pull configs
  pinctrl: rip out the direct pinconf API
  pinctrl-tz1090-pdc: add TZ1090 PDC pinctrl driver
  pinctrl-tz1090: add TZ1090 pinctrl driver
  pinctrl: samsung: Staticize drvdata_list
  pinctrl: rockchip: Add missing irq_gc_unlock() call before return error
  pinctrl: abx500: rework error path
  pinctrl: abx500: suppress hardcoded value
  pinctrl: abx500: factorize code
  pinctrl: abx500: fix abx500_gpio_get()
  pinctrl: abx500: fix abx500_pin_config_set()
  pinctrl: abx500: Add device tree support
  sh-pfc: Guard DT parsing with #ifdef CONFIG_OF
  pinctrl: add Intel BayTrail GPIO/pinctrl support
  pinctrl: fix pinconf_ops::pin_config_dbg_parse_modify kerneldoc
  pinctrl: Staticize local symbols
  ...

Conflicts:
	drivers/net/ethernet/ti/davinci_mdio.c
	drivers/pinctrl/Makefile
This commit is contained in:
Linus Torvalds
2013-07-03 11:48:03 -07:00
parent a6e6d863cf 2207a4e1ca
commit 3dbde57ad9
60 changed files with 12449 additions and 2947 deletions
Download Patch File Download Diff File Expand all files Collapse all files

70
drivers/spi/spi-pl022.c
View File

@@ -368,11 +368,6 @@ struct pl022 {
resource_size_t phybase;
void __iomem *virtbase;
struct clk *clk;
/* Two optional pin states - default & sleep */
struct pinctrl *pinctrl;
struct pinctrl_state *pins_default;
struct pinctrl_state *pins_idle;
struct pinctrl_state *pins_sleep;
struct spi_master *master;
struct pl022_ssp_controller *master_info;
/* Message per-transfer pump */
@@ -2134,32 +2129,7 @@ static int pl022_probe(struct amba_device *adev, const struct amba_id *id)
pl022->chipselects = devm_kzalloc(dev, num_cs * sizeof(int),
GFP_KERNEL);
pl022->pinctrl = devm_pinctrl_get(dev);
if (IS_ERR(pl022->pinctrl)) {
status = PTR_ERR(pl022->pinctrl);
goto err_no_pinctrl;
}
pl022->pins_default = pinctrl_lookup_state(pl022->pinctrl,
PINCTRL_STATE_DEFAULT);
/* enable pins to be muxed in and configured */
if (!IS_ERR(pl022->pins_default)) {
status = pinctrl_select_state(pl022->pinctrl,
pl022->pins_default);
if (status)
dev_err(dev, "could not set default pins\n");
} else
dev_err(dev, "could not get default pinstate\n");
pl022->pins_idle = pinctrl_lookup_state(pl022->pinctrl,
PINCTRL_STATE_IDLE);
if (IS_ERR(pl022->pins_idle))
dev_dbg(dev, "could not get idle pinstate\n");
pl022->pins_sleep = pinctrl_lookup_state(pl022->pinctrl,
PINCTRL_STATE_SLEEP);
if (IS_ERR(pl022->pins_sleep))
dev_dbg(dev, "could not get sleep pinstate\n");
pinctrl_pm_select_default_state(dev);
/*
* Bus Number Which has been Assigned to this SSP controller
@@ -2309,7 +2279,6 @@ static int pl022_probe(struct amba_device *adev, const struct amba_id *id)
amba_release_regions(adev);
err_no_ioregion:
err_no_gpio:
err_no_pinctrl:
spi_master_put(master);
return status;
}
@@ -2349,44 +2318,21 @@ pl022_remove(struct amba_device *adev)
*/
static void pl022_suspend_resources(struct pl022 *pl022, bool runtime)
{
int ret;
struct pinctrl_state *pins_state;
clk_disable(pl022->clk);
pins_state = runtime ? pl022->pins_idle : pl022->pins_sleep;
/* Optionally let pins go into sleep states */
if (!IS_ERR(pins_state)) {
ret = pinctrl_select_state(pl022->pinctrl, pins_state);
if (ret)
dev_err(&pl022->adev->dev, "could not set %s pins\n",
runtime ? "idle" : "sleep");
}
if (runtime)
pinctrl_pm_select_idle_state(&pl022->adev->dev);
else
pinctrl_pm_select_sleep_state(&pl022->adev->dev);
}
static void pl022_resume_resources(struct pl022 *pl022, bool runtime)
{
int ret;
/* Optionaly enable pins to be muxed in and configured */
/* First go to the default state */
if (!IS_ERR(pl022->pins_default)) {
ret = pinctrl_select_state(pl022->pinctrl, pl022->pins_default);
if (ret)
dev_err(&pl022->adev->dev,
"could not set default pins\n");
}
if (!runtime) {
pinctrl_pm_select_default_state(&pl022->adev->dev);
if (!runtime)
/* Then let's idle the pins until the next transfer happens */
if (!IS_ERR(pl022->pins_idle)) {
ret = pinctrl_select_state(pl022->pinctrl,
pl022->pins_idle);
if (ret)
dev_err(&pl022->adev->dev,
"could not set idle pins\n");
}
}
pinctrl_pm_select_idle_state(&pl022->adev->dev);
clk_enable(pl022->clk);
}