Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux
Pull arm64 updates from Catalin Marinas: - Pseudo NMI support for arm64 using GICv3 interrupt priorities - uaccess macros clean-up (unsafe user accessors also merged but reverted, waiting for objtool support on arm64) - ptrace regsets for Pointer Authentication (ARMv8.3) key management - inX() ordering w.r.t. delay() on arm64 and riscv (acks in place by the riscv maintainers) - arm64/perf updates: PMU bindings converted to json-schema, unused variable and misleading comment removed - arm64/debug fixes to ensure checking of the triggering exception level and to avoid the propagation of the UNKNOWN FAR value into the si_code for debug signals - Workaround for Fujitsu A64FX erratum 010001 - lib/raid6 ARM NEON optimisations - NR_CPUS now defaults to 256 on arm64 - Minor clean-ups (documentation/comments, Kconfig warning, unused asm-offsets, clang warnings) - MAINTAINERS update for list information to the ARM64 ACPI entry * tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (54 commits) arm64: mmu: drop paging_init comments arm64: debug: Ensure debug handlers check triggering exception level arm64: debug: Don't propagate UNKNOWN FAR into si_code for debug signals Revert "arm64: uaccess: Implement unsafe accessors" arm64: avoid clang warning about self-assignment arm64: Kconfig.platforms: fix warning unmet direct dependencies lib/raid6: arm: optimize away a mask operation in NEON recovery routine lib/raid6: use vdupq_n_u8 to avoid endianness warnings arm64: io: Hook up __io_par() for inX() ordering riscv: io: Update __io_[p]ar() macros to take an argument asm-generic/io: Pass result of I/O accessor to __io_[p]ar() arm64: Add workaround for Fujitsu A64FX erratum 010001 arm64: Rename get_thread_info() arm64: Remove documentation about TIF_USEDFPU arm64: irqflags: Fix clang build warnings arm64: Enable the support of pseudo-NMIs arm64: Skip irqflags tracing for NMI in IRQs disabled context arm64: Skip preemption when exiting an NMI arm64: Handle serror in NMI context irqchip/gic-v3: Allow interrupts to be set as pseudo-NMI ...
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@@ -267,7 +267,7 @@ static inline void __user *__uaccess_mask_ptr(const void __user *ptr)
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: "+r" (err), "=&r" (x) \
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: "r" (addr), "i" (-EFAULT))
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#define __get_user_err(x, ptr, err) \
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#define __raw_get_user(x, ptr, err) \
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do { \
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unsigned long __gu_val; \
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__chk_user_ptr(ptr); \
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@@ -296,28 +296,22 @@ do { \
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(x) = (__force __typeof__(*(ptr)))__gu_val; \
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} while (0)
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#define __get_user_check(x, ptr, err) \
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({ \
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#define __get_user_error(x, ptr, err) \
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do { \
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__typeof__(*(ptr)) __user *__p = (ptr); \
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might_fault(); \
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if (access_ok(__p, sizeof(*__p))) { \
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__p = uaccess_mask_ptr(__p); \
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__get_user_err((x), __p, (err)); \
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__raw_get_user((x), __p, (err)); \
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} else { \
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(x) = 0; (err) = -EFAULT; \
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} \
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})
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#define __get_user_error(x, ptr, err) \
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({ \
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__get_user_check((x), (ptr), (err)); \
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(void)0; \
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})
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} while (0)
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#define __get_user(x, ptr) \
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({ \
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int __gu_err = 0; \
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__get_user_check((x), (ptr), __gu_err); \
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__get_user_error((x), (ptr), __gu_err); \
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__gu_err; \
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})
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@@ -337,7 +331,7 @@ do { \
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: "+r" (err) \
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: "r" (x), "r" (addr), "i" (-EFAULT))
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#define __put_user_err(x, ptr, err) \
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#define __raw_put_user(x, ptr, err) \
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do { \
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__typeof__(*(ptr)) __pu_val = (x); \
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__chk_user_ptr(ptr); \
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@@ -365,28 +359,22 @@ do { \
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uaccess_disable_not_uao(); \
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} while (0)
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#define __put_user_check(x, ptr, err) \
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({ \
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#define __put_user_error(x, ptr, err) \
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do { \
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__typeof__(*(ptr)) __user *__p = (ptr); \
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might_fault(); \
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if (access_ok(__p, sizeof(*__p))) { \
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__p = uaccess_mask_ptr(__p); \
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__put_user_err((x), __p, (err)); \
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__raw_put_user((x), __p, (err)); \
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} else { \
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(err) = -EFAULT; \
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} \
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})
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#define __put_user_error(x, ptr, err) \
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({ \
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__put_user_check((x), (ptr), (err)); \
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(void)0; \
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})
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} while (0)
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#define __put_user(x, ptr) \
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({ \
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int __pu_err = 0; \
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__put_user_check((x), (ptr), __pu_err); \
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__put_user_error((x), (ptr), __pu_err); \
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__pu_err; \
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})
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