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Merge branch 'linus' into irq/numa

Browse Source 
Conflicts:
	arch/mips/sibyte/bcm1480/irq.c
	arch/mips/sibyte/sb1250/irq.c

Merge reason: we gathered a few conflicts plus update to latest upstream fixes.

Signed-off-by: Ingo Molnar <mingo@elte.hu>
This commit is contained in:
Ingo Molnar
2009-06-01 21:06:21 +02:00
parent abfe0af981 d9244b5d2f
commit 3d58f48ba0
758 changed files with 19625 additions and 5339 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
arch/mips/include/asm/bitops.h
View File

@@ -567,7 +567,7 @@ static inline unsigned long __fls(unsigned long word)
int num;
if (BITS_PER_LONG == 32 &&
__builtin_constant_p(cpu_has_mips_r) && cpu_has_mips_r) {
__builtin_constant_p(cpu_has_clo_clz) && cpu_has_clo_clz) {
__asm__(
" .set push \n"
" .set mips32 \n"
@@ -644,7 +644,7 @@ static inline int fls(int x)
{
int r;
if (__builtin_constant_p(cpu_has_mips_r) && cpu_has_mips_r) {
if (__builtin_constant_p(cpu_has_clo_clz) && cpu_has_clo_clz) {
__asm__("clz %0, %1" : "=r" (x) : "r" (x));
return 32 - x;

4
arch/mips/include/asm/checksum.h
View File

@@ -40,7 +40,7 @@ static inline
__wsum csum_partial_copy_from_user(const void __user *src, void *dst, int len,
__wsum sum, int *err_ptr)
{
might_sleep();
might_fault();
return __csum_partial_copy_user((__force void *)src, dst,
len, sum, err_ptr);
}
@@ -53,7 +53,7 @@ static inline
__wsum csum_and_copy_to_user(const void *src, void __user *dst, int len,
__wsum sum, int *err_ptr)
{
might_sleep();
might_fault();
if (access_ok(VERIFY_WRITE, dst, len))
return __csum_partial_copy_user(src, (__force void *)dst,
len, sum, err_ptr);

1
arch/mips/include/asm/compat.h
View File

@@ -3,7 +3,6 @@
/*
* Architecture specific compatibility types
*/
#include <linux/seccomp.h>
#include <linux/thread_info.h>
#include <linux/types.h>
#include <asm/page.h>

9
arch/mips/include/asm/cpu-features.h
View File

@@ -147,6 +147,15 @@
#define cpu_has_mips_r (cpu_has_mips32r1 | cpu_has_mips32r2 | \
cpu_has_mips64r1 | cpu_has_mips64r2)
/*
* MIPS32, MIPS64, VR5500, IDT32332, IDT32334 and maybe a few other
* pre-MIPS32/MIPS53 processors have CLO, CLZ. For 64-bit kernels
* cpu_has_clo_clz also indicates the availability of DCLO and DCLZ.
*/
# ifndef cpu_has_clo_clz
# define cpu_has_clo_clz cpu_has_mips_r
# endif
#ifndef cpu_has_dsp
#define cpu_has_dsp (cpu_data[0].ases & MIPS_ASE_DSP)
#endif

144
arch/mips/include/asm/div64.h
View File

@@ -6,105 +6,63 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#ifndef _ASM_DIV64_H
#define _ASM_DIV64_H
#ifndef __ASM_DIV64_H
#define __ASM_DIV64_H
#include <asm-generic/div64.h>
#if BITS_PER_LONG == 64
#include <linux/types.h>
#if (_MIPS_SZLONG == 32)
#include <asm/compiler.h>
/*
* No traps on overflows for any of these...
*/
#define do_div64_32(res, high, low, base) ({ \
unsigned long __quot32, __mod32; \
unsigned long __cf, __tmp, __tmp2, __i; \
\
__asm__(".set push\n\t" \
".set noat\n\t" \
".set noreorder\n\t" \
"move %2, $0\n\t" \
"move %3, $0\n\t" \
"b 1f\n\t" \
" li %4, 0x21\n" \
"0:\n\t" \
"sll $1, %0, 0x1\n\t" \
"srl %3, %0, 0x1f\n\t" \
"or %0, $1, %5\n\t" \
"sll %1, %1, 0x1\n\t" \
"sll %2, %2, 0x1\n" \
"1:\n\t" \
"bnez %3, 2f\n\t" \
" sltu %5, %0, %z6\n\t" \
"bnez %5, 3f\n" \
"2:\n\t" \
" addiu %4, %4, -1\n\t" \
"subu %0, %0, %z6\n\t" \
"addiu %2, %2, 1\n" \
"3:\n\t" \
"bnez %4, 0b\n\t" \
" srl %5, %1, 0x1f\n\t" \
".set pop" \
: "=&r" (__mod32), "=&r" (__tmp), \
"=&r" (__quot32), "=&r" (__cf), \
"=&r" (__i), "=&r" (__tmp2) \
: "Jr" (base), "0" (high), "1" (low)); \
\
(res) = __quot32; \
__mod32; })
#define __div64_32(n, base) \
({ \
unsigned long __cf, __tmp, __tmp2, __i; \
unsigned long __quot32, __mod32; \
unsigned long __high, __low; \
unsigned long long __n; \
\
__high = *__n >> 32; \
__low = __n; \
__asm__( \
" .set push \n" \
" .set noat \n" \
" .set noreorder \n" \
" move %2, $0 \n" \
" move %3, $0 \n" \
" b 1f \n" \
" li %4, 0x21 \n" \
"0: \n" \
" sll $1, %0, 0x1 \n" \
" srl %3, %0, 0x1f \n" \
" or %0, $1, %5 \n" \
" sll %1, %1, 0x1 \n" \
" sll %2, %2, 0x1 \n" \
"1: \n" \
" bnez %3, 2f \n" \
" sltu %5, %0, %z6 \n" \
" bnez %5, 3f \n" \
"2: \n" \
" addiu %4, %4, -1 \n" \
" subu %0, %0, %z6 \n" \
" addiu %2, %2, 1 \n" \
"3: \n" \
" bnez %4, 0b\n\t" \
" srl %5, %1, 0x1f\n\t" \
" .set pop" \
: "=&r" (__mod32), "=&r" (__tmp), \
"=&r" (__quot32), "=&r" (__cf), \
"=&r" (__i), "=&r" (__tmp2) \
: "Jr" (base), "0" (__high), "1" (__low)); \
\
(__n) = __quot32; \
__mod32; \
})
#define do_div(n, base) ({ \
unsigned long long __quot; \
unsigned long __mod; \
unsigned long long __div; \
unsigned long __upper, __low, __high, __base; \
\
__div = (n); \
__base = (base); \
\
__high = __div >> 32; \
__low = __div; \
__upper = __high; \
\
if (__high) \
__asm__("divu $0, %z2, %z3" \
: "=h" (__upper), "=l" (__high) \
: "Jr" (__high), "Jr" (__base) \
: GCC_REG_ACCUM); \
\
__mod = do_div64_32(__low, __upper, __low, __base); \
\
__quot = __high; \
__quot = __quot << 32 | __low; \
(n) = __quot; \
__mod; })
#endif /* BITS_PER_LONG == 64 */
#endif /* (_MIPS_SZLONG == 32) */
#if (_MIPS_SZLONG == 64)
/*
* Hey, we're already 64-bit, no
* need to play games..
*/
#define do_div(n, base) ({ \
unsigned long __quot; \
unsigned int __mod; \
unsigned long __div; \
unsigned int __base; \
\
__div = (n); \
__base = (base); \
\
__mod = __div % __base; \
__quot = __div / __base; \
\
(n) = __quot; \
__mod; })
#endif /* (_MIPS_SZLONG == 64) */
#endif /* _ASM_DIV64_H */
#endif /* __ASM_DIV64_H */

9
arch/mips/include/asm/dma-mapping.h
View File

@@ -24,8 +24,13 @@ extern int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
enum dma_data_direction direction);
extern dma_addr_t dma_map_page(struct device *dev, struct page *page,
unsigned long offset, size_t size, enum dma_data_direction direction);
extern void dma_unmap_page(struct device *dev, dma_addr_t dma_address,
size_t size, enum dma_data_direction direction);
static inline void dma_unmap_page(struct device *dev, dma_addr_t dma_address,
size_t size, enum dma_data_direction direction)
{
dma_unmap_single(dev, dma_address, size, direction);
}
extern void dma_unmap_sg(struct device *dev, struct scatterlist *sg,
int nhwentries, enum dma_data_direction direction);
extern void dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle,

3
arch/mips/include/asm/fixmap.h
View File

@@ -108,6 +108,9 @@ static inline unsigned long virt_to_fix(const unsigned long vaddr)
return __virt_to_fix(vaddr);
}
#define kmap_get_fixmap_pte(vaddr) \
pte_offset_kernel(pmd_offset(pud_offset(pgd_offset_k(vaddr), (vaddr)), (vaddr)), (vaddr))
/*
* Called from pgtable_init()
*/

5
arch/mips/include/asm/hazards.h
View File

@@ -138,8 +138,9 @@ do { \
__instruction_hazard(); \
} while (0)
#elif defined(CONFIG_CPU_R10000) || defined(CONFIG_CPU_CAVIUM_OCTEON) || \
defined(CONFIG_CPU_R5500) || defined(CONFIG_MACH_ALCHEMY)
#elif defined(CONFIG_MACH_ALCHEMY) || defined(CONFIG_CPU_CAVIUM_OCTEON) || \
defined(CONFIG_CPU_LOONGSON2) || defined(CONFIG_CPU_R10000) || \
defined(CONFIG_CPU_R5500)
/*
* R10000 rocks - all hazards handled in hardware, so this becomes a nobrainer.

6
arch/mips/include/asm/highmem.h
View File

@@ -30,8 +30,6 @@
/* declarations for highmem.c */
extern unsigned long highstart_pfn, highend_pfn;
extern pte_t *kmap_pte;
extern pgprot_t kmap_prot;
extern pte_t *pkmap_page_table;
/*
@@ -62,6 +60,10 @@ extern struct page *__kmap_atomic_to_page(void *ptr);
#define flush_cache_kmaps() flush_cache_all()
extern void kmap_init(void);
#define kmap_prot PAGE_KERNEL
#endif /* __KERNEL__ */
#endif /* _ASM_HIGHMEM_H */

6
arch/mips/include/asm/mach-au1x00/au1000.h
View File

@@ -715,7 +715,7 @@ enum soc_au1500_ints {
#ifdef CONFIG_SOC_AU1100
enum soc_au1100_ints {
AU1100_FIRST_INT = MIPS_CPU_IRQ_BASE + 8,
AU1100_UART0_INT,
AU1100_UART0_INT = AU1100_FIRST_INT,
AU1100_UART1_INT,
AU1100_SD_INT,
AU1100_UART3_INT,
@@ -902,8 +902,8 @@ enum soc_au1200_ints {
AU1000_RTC_MATCH0_INT,
AU1000_RTC_MATCH1_INT,
AU1000_RTC_MATCH2_INT,
AU1200_NAND_INT = AU1200_FIRST_INT + 23,
AU1200_GPIO_203,
AU1200_NAND_INT,
AU1200_GPIO_204,
AU1200_GPIO_205,
AU1200_GPIO_206,

17
arch/mips/include/asm/mach-au1x00/au1xxx_ide.h
View File

@@ -46,20 +46,6 @@
#define CONFIG_BLK_DEV_IDE_AU1XXX_BURSTABLE_ON 0
#endif
#ifdef CONFIG_PM
/*
* This will enable the device to be powered up when write() or read()
* is called. If this is not defined, the driver will return -EBUSY.
*/
#define WAKE_ON_ACCESS 1
typedef struct {
spinlock_t lock; /* Used to block on state transitions */
au1xxx_power_dev_t *dev; /* Power Managers device structure */
unsigned stopped; /* Used to signal device is stopped */
} pm_state;
#endif
typedef struct {
u32 tx_dev_id, rx_dev_id, target_dev_id;
u32 tx_chan, rx_chan;
@@ -72,9 +58,6 @@ typedef struct {
#endif
int irq;
u32 regbase;
#ifdef CONFIG_PM
pm_state pm;
#endif
} _auide_hwif;
/******************************************************************************/

59
arch/mips/include/asm/mach-lemote/cpu-feature-overrides.h Normal file
View File

@@ -0,0 +1,59 @@
/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 2009 Wu Zhangjin <wuzj@lemote.com>
* Copyright (C) 2009 Philippe Vachon <philippe@cowpig.ca>
* Copyright (C) 2009 Zhang Le <r0bertz@gentoo.org>
*
* reference: /proc/cpuinfo,
* arch/mips/kernel/cpu-probe.c(cpu_probe_legacy),
* arch/mips/kernel/proc.c(show_cpuinfo),
* loongson2f user manual.
*/
#ifndef __ASM_MACH_LEMOTE_CPU_FEATURE_OVERRIDES_H
#define __ASM_MACH_LEMOTE_CPU_FEATURE_OVERRIDES_H
#define cpu_dcache_line_size() 32
#define cpu_icache_line_size() 32
#define cpu_scache_line_size() 32
#define cpu_has_32fpr 1
#define cpu_has_3k_cache 0
#define cpu_has_4k_cache 1
#define cpu_has_4kex 1
#define cpu_has_64bits 1
#define cpu_has_cache_cdex_p 0
#define cpu_has_cache_cdex_s 0
#define cpu_has_counter 1
#define cpu_has_dc_aliases 1
#define cpu_has_divec 0
#define cpu_has_dsp 0
#define cpu_has_ejtag 0
#define cpu_has_fpu 1
#define cpu_has_ic_fills_f_dc 0
#define cpu_has_inclusive_pcaches 1
#define cpu_has_llsc 1
#define cpu_has_mcheck 0
#define cpu_has_mdmx 0
#define cpu_has_mips16 0
#define cpu_has_mips32r1 0
#define cpu_has_mips32r2 0
#define cpu_has_mips3d 0
#define cpu_has_mips64r1 0
#define cpu_has_mips64r2 0
#define cpu_has_mipsmt 0
#define cpu_has_prefetch 0
#define cpu_has_smartmips 0
#define cpu_has_tlb 1
#define cpu_has_tx39_cache 0
#define cpu_has_userlocal 0
#define cpu_has_vce 0
#define cpu_has_vtag_icache 0
#define cpu_has_watch 1
#define cpu_icache_snoops_remote_store 1
#endif /* __ASM_MACH_LEMOTE_CPU_FEATURE_OVERRIDES_H */

38
arch/mips/include/asm/mipsregs.h
View File

@@ -184,12 +184,19 @@
#else
#define PM_4K 0x00000000
#define PM_8K 0x00002000
#define PM_16K 0x00006000
#define PM_32K 0x0000e000
#define PM_64K 0x0001e000
#define PM_128K 0x0003e000
#define PM_256K 0x0007e000
#define PM_512K 0x000fe000
#define PM_1M 0x001fe000
#define PM_2M 0x003fe000
#define PM_4M 0x007fe000
#define PM_8M 0x00ffe000
#define PM_16M 0x01ffe000
#define PM_32M 0x03ffe000
#define PM_64M 0x07ffe000
#define PM_256M 0x1fffe000
#define PM_1G 0x7fffe000
@@ -201,8 +208,12 @@
*/
#ifdef CONFIG_PAGE_SIZE_4KB
#define PM_DEFAULT_MASK PM_4K
#elif defined(CONFIG_PAGE_SIZE_8KB)
#define PM_DEFAULT_MASK PM_8K
#elif defined(CONFIG_PAGE_SIZE_16KB)
#define PM_DEFAULT_MASK PM_16K
#elif defined(CONFIG_PAGE_SIZE_32KB)
#define PM_DEFAULT_MASK PM_32K
#elif defined(CONFIG_PAGE_SIZE_64KB)
#define PM_DEFAULT_MASK PM_64K
#else
@@ -717,8 +728,8 @@ do { \
".set\tmips64\n\t" \
"dmfc0\t%M0, " #source "\n\t" \
"dsll\t%L0, %M0, 32\n\t" \
"dsrl\t%M0, %M0, 32\n\t" \
"dsrl\t%L0, %L0, 32\n\t" \
"dsra\t%M0, %M0, 32\n\t" \
"dsra\t%L0, %L0, 32\n\t" \
".set\tmips0" \
: "=r" (__val)); \
else \
@@ -726,8 +737,8 @@ do { \
".set\tmips64\n\t" \
"dmfc0\t%M0, " #source ", " #sel "\n\t" \
"dsll\t%L0, %M0, 32\n\t" \
"dsrl\t%M0, %M0, 32\n\t" \
"dsrl\t%L0, %L0, 32\n\t" \
"dsra\t%M0, %M0, 32\n\t" \
"dsra\t%L0, %L0, 32\n\t" \
".set\tmips0" \
: "=r" (__val)); \
local_irq_restore(__flags); \
@@ -1484,14 +1495,15 @@ static inline unsigned int \
set_c0_##name(unsigned int set) \
{ \
unsigned int res; \
unsigned int new; \
unsigned int omt; \
unsigned long flags; \
\
local_irq_save(flags); \
omt = __dmt(); \
res = read_c0_##name(); \
res |= set; \
write_c0_##name(res); \
new = res | set; \
write_c0_##name(new); \
__emt(omt); \
local_irq_restore(flags); \
\
@@ -1502,14 +1514,15 @@ static inline unsigned int \
clear_c0_##name(unsigned int clear) \
{ \
unsigned int res; \
unsigned int new; \
unsigned int omt; \
unsigned long flags; \
\
local_irq_save(flags); \
omt = __dmt(); \
res = read_c0_##name(); \
res &= ~clear; \
write_c0_##name(res); \
new = res & ~clear; \
write_c0_##name(new); \
__emt(omt); \
local_irq_restore(flags); \
\
@@ -1517,9 +1530,10 @@ clear_c0_##name(unsigned int clear) \
} \
\
static inline unsigned int \
change_c0_##name(unsigned int change, unsigned int new) \
change_c0_##name(unsigned int change, unsigned int newbits) \
{ \
unsigned int res; \
unsigned int new; \
unsigned int omt; \
unsigned long flags; \
\
@@ -1527,9 +1541,9 @@ change_c0_##name(unsigned int change, unsigned int new) \
\
omt = __dmt(); \
res = read_c0_##name(); \
res &= ~change; \
res |= (new & change); \
write_c0_##name(res); \
new = res & ~change; \
new |= (newbits & change); \
write_c0_##name(new); \
__emt(omt); \
local_irq_restore(flags); \
\

3
arch/mips/include/asm/page.h
View File

@@ -23,6 +23,9 @@
#ifdef CONFIG_PAGE_SIZE_16KB
#define PAGE_SHIFT 14
#endif
#ifdef CONFIG_PAGE_SIZE_32KB
#define PAGE_SHIFT 15
#endif
#ifdef CONFIG_PAGE_SIZE_64KB
#define PAGE_SHIFT 16
#endif

6
arch/mips/include/asm/pgtable-64.h
View File

@@ -83,6 +83,12 @@
#define PMD_ORDER 0
#define PTE_ORDER 0
#endif
#ifdef CONFIG_PAGE_SIZE_32KB
#define PGD_ORDER 0
#define PUD_ORDER aieeee_attempt_to_allocate_pud
#define PMD_ORDER 0
#define PTE_ORDER 0
#endif
#ifdef CONFIG_PAGE_SIZE_64KB
#define PGD_ORDER 0
#define PUD_ORDER aieeee_attempt_to_allocate_pud

4
arch/mips/include/asm/sn/addrs.h
View File

@@ -359,11 +359,11 @@
TO_NODE_UNCAC((nasid), LAUNCH_OFFSET(nasid, slice))
#define LAUNCH_SIZE(nasid) KLD_LAUNCH(nasid)->size
#define NMI_OFFSET(nasid, slice) \
#define SN_NMI_OFFSET(nasid, slice) \
(KLD_NMI(nasid)->offset + \
KLD_NMI(nasid)->stride * (slice))
#define NMI_ADDR(nasid, slice) \
TO_NODE_UNCAC((nasid), NMI_OFFSET(nasid, slice))
TO_NODE_UNCAC((nasid), SN_NMI_OFFSET(nasid, slice))
#define NMI_SIZE(nasid) KLD_NMI(nasid)->size
#define KLCONFIG_OFFSET(nasid) KLD_KLCONFIG(nasid)->offset

4
arch/mips/include/asm/sn/nmi.h
View File

@@ -3,13 +3,13 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Derived from IRIX <sys/SN/nmi.h>, Revision 1.5.
*
* Copyright (C) 1992 - 1997 Silicon Graphics, Inc.
*/
#ifndef __ASM_SN_NMI_H
#define __ASM_SN_NMI_H
#ident "$Revision: 1.5 $"
#include <asm/sn/addrs.h>
/*

3
arch/mips/include/asm/thread_info.h
View File

@@ -75,6 +75,9 @@ register struct thread_info *__current_thread_info __asm__("$28");
#ifdef CONFIG_PAGE_SIZE_16KB
#define THREAD_SIZE_ORDER (0)
#endif
#ifdef CONFIG_PAGE_SIZE_32KB
#define THREAD_SIZE_ORDER (0)
#endif
#ifdef CONFIG_PAGE_SIZE_64KB
#define THREAD_SIZE_ORDER (0)
#endif

6
arch/mips/include/asm/time.h
View File

@@ -57,7 +57,11 @@ extern int r4k_clockevent_init(void);
static inline int mips_clockevent_init(void)
{
#ifdef CONFIG_CEVT_R4K
#ifdef CONFIG_MIPS_MT_SMTC
extern int smtc_clockevent_init(void);
return smtc_clockevent_init();
#elif defined(CONFIG_CEVT_R4K)
return r4k_clockevent_init();
#else
return -ENXIO;

68
arch/mips/include/asm/uaccess.h
View File

@@ -105,10 +105,20 @@
#define __access_mask get_fs().seg
#define __access_ok(addr, size, mask) \
(((signed long)((mask) & ((addr) | ((addr) + (size)) | __ua_size(size)))) == 0)
({ \
unsigned long __addr = (unsigned long) (addr); \
unsigned long __size = size; \
unsigned long __mask = mask; \
unsigned long __ok; \
\
__chk_user_ptr(addr); \
__ok = (signed long)(__mask & (__addr | (__addr + __size) | \
__ua_size(__size))); \
__ok == 0; \
})
#define access_ok(type, addr, size) \
likely(__access_ok((unsigned long)(addr), (size), __access_mask))
likely(__access_ok((addr), (size), __access_mask))
/*
* put_user: - Write a simple value into user space.
@@ -225,6 +235,7 @@ do { \
({ \
int __gu_err; \
\
__chk_user_ptr(ptr); \
__get_user_common((x), size, ptr); \
__gu_err; \
})
@@ -234,6 +245,7 @@ do { \
int __gu_err = -EFAULT; \
const __typeof__(*(ptr)) __user * __gu_ptr = (ptr); \
\
might_fault(); \
if (likely(access_ok(VERIFY_READ, __gu_ptr, size))) \
__get_user_common((x), size, __gu_ptr); \
\
@@ -305,6 +317,7 @@ do { \
__typeof__(*(ptr)) __pu_val; \
int __pu_err = 0; \
\
__chk_user_ptr(ptr); \
__pu_val = (x); \
switch (size) { \
case 1: __put_user_asm("sb", ptr); break; \
@@ -322,6 +335,7 @@ do { \
__typeof__(*(ptr)) __pu_val = (x); \
int __pu_err = -EFAULT; \
\
might_fault(); \
if (likely(access_ok(VERIFY_WRITE, __pu_addr, size))) { \
switch (size) { \
case 1: __put_user_asm("sb", __pu_addr); break; \
@@ -696,10 +710,10 @@ extern size_t __copy_user(void *__to, const void *__from, size_t __n);
const void *__cu_from; \
long __cu_len; \
\
might_sleep(); \
__cu_to = (to); \
__cu_from = (from); \
__cu_len = (n); \
might_fault(); \
__cu_len = __invoke_copy_to_user(__cu_to, __cu_from, __cu_len); \
__cu_len; \
})
@@ -752,13 +766,14 @@ extern size_t __copy_user_inatomic(void *__to, const void *__from, size_t __n);
const void *__cu_from; \
long __cu_len; \
\
might_sleep(); \
__cu_to = (to); \
__cu_from = (from); \
__cu_len = (n); \
if (access_ok(VERIFY_WRITE, __cu_to, __cu_len)) \
if (access_ok(VERIFY_WRITE, __cu_to, __cu_len)) { \
might_fault(); \
__cu_len = __invoke_copy_to_user(__cu_to, __cu_from, \
__cu_len); \
} \
__cu_len; \
})
@@ -831,10 +846,10 @@ extern size_t __copy_user_inatomic(void *__to, const void *__from, size_t __n);
const void __user *__cu_from; \
long __cu_len; \
\
might_sleep(); \
__cu_to = (to); \
__cu_from = (from); \
__cu_len = (n); \
might_fault(); \
__cu_len = __invoke_copy_from_user(__cu_to, __cu_from, \
__cu_len); \
__cu_len; \
@@ -862,17 +877,31 @@ extern size_t __copy_user_inatomic(void *__to, const void *__from, size_t __n);
const void __user *__cu_from; \
long __cu_len; \
\
might_sleep(); \
__cu_to = (to); \
__cu_from = (from); \
__cu_len = (n); \
if (access_ok(VERIFY_READ, __cu_from, __cu_len)) \
if (access_ok(VERIFY_READ, __cu_from, __cu_len)) { \
might_fault(); \
__cu_len = __invoke_copy_from_user(__cu_to, __cu_from, \
__cu_len); \
} \
__cu_len; \
})
#define __copy_in_user(to, from, n) __copy_from_user(to, from, n)
#define __copy_in_user(to, from, n) \
({ \
void __user *__cu_to; \
const void __user *__cu_from; \
long __cu_len; \
\
__cu_to = (to); \
__cu_from = (from); \
__cu_len = (n); \
might_fault(); \
__cu_len = __invoke_copy_from_user(__cu_to, __cu_from, \
__cu_len); \
__cu_len; \
})
#define copy_in_user(to, from, n) \
({ \
@@ -880,14 +909,15 @@ extern size_t __copy_user_inatomic(void *__to, const void *__from, size_t __n);
const void __user *__cu_from; \
long __cu_len; \
\
might_sleep(); \
__cu_to = (to); \
__cu_from = (from); \
__cu_len = (n); \
if (likely(access_ok(VERIFY_READ, __cu_from, __cu_len) && \
access_ok(VERIFY_WRITE, __cu_to, __cu_len))) \
access_ok(VERIFY_WRITE, __cu_to, __cu_len))) { \
might_fault(); \
__cu_len = __invoke_copy_from_user(__cu_to, __cu_from, \
__cu_len); \
} \
__cu_len; \
})
@@ -907,7 +937,7 @@ __clear_user(void __user *addr, __kernel_size_t size)
{
__kernel_size_t res;
might_sleep();
might_fault();
__asm__ __volatile__(
"move\t$4, %1\n\t"
"move\t$5, $0\n\t"
@@ -926,7 +956,7 @@ __clear_user(void __user *addr, __kernel_size_t size)
void __user * __cl_addr = (addr); \
unsigned long __cl_size = (n); \
if (__cl_size && access_ok(VERIFY_WRITE, \
((unsigned long)(__cl_addr)), __cl_size)) \
__cl_addr, __cl_size)) \
__cl_size = __clear_user(__cl_addr, __cl_size); \
__cl_size; \
})
@@ -956,7 +986,7 @@ __strncpy_from_user(char *__to, const char __user *__from, long __len)
{
long res;
might_sleep();
might_fault();
__asm__ __volatile__(
"move\t$4, %1\n\t"
"move\t$5, %2\n\t"
@@ -993,7 +1023,7 @@ strncpy_from_user(char *__to, const char __user *__from, long __len)
{
long res;
might_sleep();
might_fault();
__asm__ __volatile__(
"move\t$4, %1\n\t"
"move\t$5, %2\n\t"
@@ -1012,7 +1042,7 @@ static inline long __strlen_user(const char __user *s)
{
long res;
might_sleep();
might_fault();
__asm__ __volatile__(
"move\t$4, %1\n\t"
__MODULE_JAL(__strlen_user_nocheck_asm)
@@ -1042,7 +1072,7 @@ static inline long strlen_user(const char __user *s)
{
long res;
might_sleep();
might_fault();
__asm__ __volatile__(
"move\t$4, %1\n\t"
__MODULE_JAL(__strlen_user_asm)
@@ -1059,7 +1089,7 @@ static inline long __strnlen_user(const char __user *s, long n)
{
long res;
might_sleep();
might_fault();
__asm__ __volatile__(
"move\t$4, %1\n\t"
"move\t$5, %2\n\t"
@@ -1090,7 +1120,7 @@ static inline long strnlen_user(const char __user *s, long n)
{
long res;
might_sleep();
might_fault();
__asm__ __volatile__(
"move\t$4, %1\n\t"
"move\t$5, %2\n\t"