Merge tag 'arc-3.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc
Pull ARC updates from Vineet Gupta: "Sorry for the late pull request. Current stuff was ready for a while but I was hoping to squeeze in support for almost ready ARC SDP platform (and avoid a 2nd pull request), however it seems there are still some loose ends which warrant more time. - Platform code reduction/moving-up (TB10X no longer needs any callbacks) - updated boot printing - kgdb update for arc gdb 7.5 - bug fixes (some marked for stable) - more code refactoring/consolidation" * tag 'arc-3.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc: ARC: boot: cpu feature print enhancements ARC: boot: consolidate cross-checking of h/w and s/w ARC: unbork FPU save/restore ARC: remove extraneous __KERNEL__ guards ARC: Update order of registers in KGDB to match GDB 7.5 ARC: Remove unneeded Kconfig entry NO_DMA ARC: BUG() dumps stack after @msg (@msg now same as in generic BUG)) ARC: refactoring: reduce the scope of some local vars ARC: remove gcc mpy heuristics ARC: RIP @running_on_hw ARC: Update comments about uncached address space ARC: rename kconfig option for unaligned emulation ARC: [nsimosci] Allow "headless" models to boot ARC: [arcfpga] Get rid of ARC_BOARD_ANGEL4 and ARC_BOARD_ML509 ARC: [arcfpga] Remove more dead code ARC: [plat*] move code out of .init_machine into common ARC: [arcfpga] consolidate machine description, DT ARC: Allow SMP kernel to build/boot on UP-only infrastructure
Šī revīzija ir iekļauta:
@@ -9,19 +9,16 @@
|
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#ifndef _ASM_ARC_ARCREGS_H
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#define _ASM_ARC_ARCREGS_H
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#ifdef __KERNEL__
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/* Build Configuration Registers */
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#define ARC_REG_DCCMBASE_BCR 0x61 /* DCCM Base Addr */
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#define ARC_REG_CRC_BCR 0x62
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#define ARC_REG_DVFB_BCR 0x64
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#define ARC_REG_EXTARITH_BCR 0x65
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#define ARC_REG_VECBASE_BCR 0x68
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#define ARC_REG_PERIBASE_BCR 0x69
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#define ARC_REG_FP_BCR 0x6B /* Single-Precision FPU */
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#define ARC_REG_DPFP_BCR 0x6C /* Dbl Precision FPU */
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#define ARC_REG_FP_BCR 0x6B /* ARCompact: Single-Precision FPU */
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#define ARC_REG_DPFP_BCR 0x6C /* ARCompact: Dbl Precision FPU */
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#define ARC_REG_DCCM_BCR 0x74 /* DCCM Present + SZ */
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#define ARC_REG_TIMERS_BCR 0x75
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#define ARC_REG_AP_BCR 0x76
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#define ARC_REG_ICCM_BCR 0x78
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#define ARC_REG_XY_MEM_BCR 0x79
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#define ARC_REG_MAC_BCR 0x7a
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@@ -31,6 +28,9 @@
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#define ARC_REG_MIXMAX_BCR 0x7e
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#define ARC_REG_BARREL_BCR 0x7f
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#define ARC_REG_D_UNCACH_BCR 0x6A
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#define ARC_REG_BPU_BCR 0xc0
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#define ARC_REG_ISA_CFG_BCR 0xc1
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#define ARC_REG_SMART_BCR 0xFF
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/* status32 Bits Positions */
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#define STATUS_AE_BIT 5 /* Exception active */
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@@ -191,14 +191,6 @@
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#define PAGES_TO_KB(n_pages) ((n_pages) << (PAGE_SHIFT - 10))
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#define PAGES_TO_MB(n_pages) (PAGES_TO_KB(n_pages) >> 10)
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#ifdef CONFIG_ARC_FPU_SAVE_RESTORE
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/* These DPFP regs need to be saved/restored across ctx-sw */
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struct arc_fpu {
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struct {
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unsigned int l, h;
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} aux_dpfp[2];
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};
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#endif
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/*
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***************************************************************
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@@ -212,27 +204,19 @@ struct bcr_identity {
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#endif
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};
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#define EXTN_SWAP_VALID 0x1
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#define EXTN_NORM_VALID 0x2
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#define EXTN_MINMAX_VALID 0x2
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#define EXTN_BARREL_VALID 0x2
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struct bcr_extn {
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struct bcr_isa {
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#ifdef CONFIG_CPU_BIG_ENDIAN
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unsigned int pad:20, crc:1, ext_arith:2, mul:2, barrel:2, minmax:2,
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norm:2, swap:1;
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unsigned int pad1:23, atomic1:1, ver:8;
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#else
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unsigned int swap:1, norm:2, minmax:2, barrel:2, mul:2, ext_arith:2,
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crc:1, pad:20;
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unsigned int ver:8, atomic1:1, pad1:23;
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#endif
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};
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/* DSP Options Ref Manual */
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struct bcr_extn_mac_mul {
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struct bcr_mpy {
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#ifdef CONFIG_CPU_BIG_ENDIAN
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unsigned int pad:16, type:8, ver:8;
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unsigned int pad:8, x1616:8, dsp:4, cycles:2, type:2, ver:8;
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#else
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unsigned int ver:8, type:8, pad:16;
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unsigned int ver:8, type:2, cycles:2, dsp:4, x1616:8, pad:8;
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#endif
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};
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@@ -251,6 +235,7 @@ struct bcr_perip {
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unsigned int pad:8, sz:8, pad2:8, start:8;
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#endif
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};
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|
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struct bcr_iccm {
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#ifdef CONFIG_CPU_BIG_ENDIAN
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unsigned int base:16, pad:5, sz:3, ver:8;
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@@ -277,8 +262,8 @@ struct bcr_dccm {
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#endif
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};
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/* Both SP and DP FPU BCRs have same format */
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struct bcr_fp {
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/* ARCompact: Both SP and DP FPU BCRs have same format */
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struct bcr_fp_arcompact {
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#ifdef CONFIG_CPU_BIG_ENDIAN
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unsigned int fast:1, ver:8;
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#else
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@@ -286,6 +271,30 @@ struct bcr_fp {
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#endif
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};
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struct bcr_timer {
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#ifdef CONFIG_CPU_BIG_ENDIAN
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unsigned int pad2:15, rtsc:1, pad1:6, t1:1, t0:1, ver:8;
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#else
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unsigned int ver:8, t0:1, t1:1, pad1:6, rtsc:1, pad2:15;
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#endif
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};
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struct bcr_bpu_arcompact {
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#ifdef CONFIG_CPU_BIG_ENDIAN
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unsigned int pad2:19, fam:1, pad:2, ent:2, ver:8;
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#else
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unsigned int ver:8, ent:2, pad:2, fam:1, pad2:19;
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#endif
|
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};
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struct bcr_generic {
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#ifdef CONFIG_CPU_BIG_ENDIAN
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unsigned int pad:24, ver:8;
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#else
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unsigned int ver:8, pad:24;
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#endif
|
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};
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/*
|
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*******************************************************************
|
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* Generic structures to hold build configuration used at runtime
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@@ -299,6 +308,10 @@ struct cpuinfo_arc_cache {
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unsigned int sz_k:8, line_len:8, assoc:4, ver:4, alias:1, vipt:1, pad:6;
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};
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struct cpuinfo_arc_bpu {
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unsigned int ver, full, num_cache, num_pred;
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};
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struct cpuinfo_arc_ccm {
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unsigned int base_addr, sz;
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};
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@@ -306,21 +319,25 @@ struct cpuinfo_arc_ccm {
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struct cpuinfo_arc {
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struct cpuinfo_arc_cache icache, dcache;
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struct cpuinfo_arc_mmu mmu;
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struct cpuinfo_arc_bpu bpu;
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struct bcr_identity core;
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unsigned int timers;
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struct bcr_isa isa;
|
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struct bcr_timer timers;
|
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unsigned int vec_base;
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unsigned int uncached_base;
|
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struct cpuinfo_arc_ccm iccm, dccm;
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struct bcr_extn extn;
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struct {
|
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unsigned int swap:1, norm:1, minmax:1, barrel:1, crc:1, pad1:3,
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fpu_sp:1, fpu_dp:1, pad2:6,
|
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debug:1, ap:1, smart:1, rtt:1, pad3:4,
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pad4:8;
|
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} extn;
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struct bcr_mpy extn_mpy;
|
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struct bcr_extn_xymem extn_xymem;
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struct bcr_extn_mac_mul extn_mac_mul;
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struct bcr_fp fp, dpfp;
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};
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extern struct cpuinfo_arc cpuinfo_arc700[];
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#endif /* __ASEMBLY__ */
|
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#endif /* __KERNEL__ */
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#endif /* _ASM_ARC_ARCREGS_H */
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|
@@ -9,8 +9,6 @@
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#ifndef _ASM_ARC_ATOMIC_H
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#define _ASM_ARC_ATOMIC_H
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#ifdef __KERNEL__
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|
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#ifndef __ASSEMBLY__
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|
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#include <linux/types.h>
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@@ -170,5 +168,3 @@ ATOMIC_OP(and, &=, and)
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#endif
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|
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#endif
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|
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#endif
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|
@@ -13,8 +13,6 @@
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#error only <linux/bitops.h> can be included directly
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#endif
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#ifdef __KERNEL__
|
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|
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#ifndef __ASSEMBLY__
|
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|
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#include <linux/types.h>
|
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@@ -508,6 +506,4 @@ static inline __attribute__ ((const)) int __ffs(unsigned long word)
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|
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#endif /* !__ASSEMBLY__ */
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||||
|
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#endif /* __KERNEL__ */
|
||||
|
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#endif
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|
@@ -21,10 +21,9 @@ void show_kernel_fault_diag(const char *str, struct pt_regs *regs,
|
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unsigned long address);
|
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void die(const char *str, struct pt_regs *regs, unsigned long address);
|
||||
|
||||
#define BUG() do { \
|
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dump_stack(); \
|
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pr_warn("Kernel BUG in %s: %s: %d!\n", \
|
||||
__FILE__, __func__, __LINE__); \
|
||||
#define BUG() do { \
|
||||
pr_warn("BUG: failure at %s:%d/%s()!\n", __FILE__, __LINE__, __func__); \
|
||||
dump_stack(); \
|
||||
} while (0)
|
||||
|
||||
#define HAVE_ARCH_BUG
|
||||
|
@@ -20,7 +20,7 @@
|
||||
#define CACHE_LINE_MASK (~(L1_CACHE_BYTES - 1))
|
||||
|
||||
/*
|
||||
* ARC700 doesn't cache any access in top 256M.
|
||||
* ARC700 doesn't cache any access in top 1G (0xc000_0000 to 0xFFFF_FFFF)
|
||||
* Ideal for wiring memory mapped peripherals as we don't need to do
|
||||
* explicit uncached accesses (LD.di/ST.di) hence more portable drivers
|
||||
*/
|
||||
|
@@ -12,8 +12,6 @@
|
||||
#ifndef _ASM_ARC_CURRENT_H
|
||||
#define _ASM_ARC_CURRENT_H
|
||||
|
||||
#ifdef __KERNEL__
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
#ifdef CONFIG_ARC_CURR_IN_REG
|
||||
@@ -27,6 +25,4 @@ register struct task_struct *curr_arc asm("r25");
|
||||
|
||||
#endif /* ! __ASSEMBLY__ */
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
|
||||
#endif /* _ASM_ARC_CURRENT_H */
|
||||
|
@@ -15,8 +15,6 @@
|
||||
* -Conditionally disable interrupts (if they are not enabled, don't disable)
|
||||
*/
|
||||
|
||||
#ifdef __KERNEL__
|
||||
|
||||
#include <asm/arcregs.h>
|
||||
|
||||
/* status32 Reg bits related to Interrupt Handling */
|
||||
@@ -169,6 +167,4 @@ static inline int arch_irqs_disabled(void)
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
|
||||
#endif /* KERNEL */
|
||||
|
||||
#endif
|
||||
|
@@ -19,7 +19,7 @@
|
||||
* register API yet */
|
||||
#undef DBG_MAX_REG_NUM
|
||||
|
||||
#define GDB_MAX_REGS 39
|
||||
#define GDB_MAX_REGS 87
|
||||
|
||||
#define BREAK_INSTR_SIZE 2
|
||||
#define CACHE_FLUSH_IS_SAFE 1
|
||||
@@ -33,23 +33,27 @@ static inline void arch_kgdb_breakpoint(void)
|
||||
|
||||
extern void kgdb_trap(struct pt_regs *regs);
|
||||
|
||||
enum arc700_linux_regnums {
|
||||
/* This is the numbering of registers according to the GDB. See GDB's
|
||||
* arc-tdep.h for details.
|
||||
*
|
||||
* Registers are ordered for GDB 7.5. It is incompatible with GDB 6.8. */
|
||||
enum arc_linux_regnums {
|
||||
_R0 = 0,
|
||||
_R1, _R2, _R3, _R4, _R5, _R6, _R7, _R8, _R9, _R10, _R11, _R12, _R13,
|
||||
_R14, _R15, _R16, _R17, _R18, _R19, _R20, _R21, _R22, _R23, _R24,
|
||||
_R25, _R26,
|
||||
_BTA = 27,
|
||||
_LP_START = 28,
|
||||
_LP_END = 29,
|
||||
_LP_COUNT = 30,
|
||||
_STATUS32 = 31,
|
||||
_BLINK = 32,
|
||||
_FP = 33,
|
||||
__SP = 34,
|
||||
_EFA = 35,
|
||||
_RET = 36,
|
||||
_ORIG_R8 = 37,
|
||||
_STOP_PC = 38
|
||||
_FP = 27,
|
||||
__SP = 28,
|
||||
_R30 = 30,
|
||||
_BLINK = 31,
|
||||
_LP_COUNT = 60,
|
||||
_STOP_PC = 64,
|
||||
_RET = 64,
|
||||
_LP_START = 65,
|
||||
_LP_END = 66,
|
||||
_STATUS32 = 67,
|
||||
_ECR = 76,
|
||||
_BTA = 82,
|
||||
};
|
||||
|
||||
#else
|
||||
|
@@ -14,12 +14,19 @@
|
||||
#ifndef __ASM_ARC_PROCESSOR_H
|
||||
#define __ASM_ARC_PROCESSOR_H
|
||||
|
||||
#ifdef __KERNEL__
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
#include <asm/ptrace.h>
|
||||
|
||||
#ifdef CONFIG_ARC_FPU_SAVE_RESTORE
|
||||
/* These DPFP regs need to be saved/restored across ctx-sw */
|
||||
struct arc_fpu {
|
||||
struct {
|
||||
unsigned int l, h;
|
||||
} aux_dpfp[2];
|
||||
};
|
||||
#endif
|
||||
|
||||
/* Arch specific stuff which needs to be saved per task.
|
||||
* However these items are not so important so as to earn a place in
|
||||
* struct thread_info
|
||||
@@ -128,6 +135,4 @@ extern unsigned int get_wchan(struct task_struct *p);
|
||||
*/
|
||||
#define TASK_UNMAPPED_BASE (TASK_SIZE / 3)
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
|
||||
#endif /* __ASM_ARC_PROCESSOR_H */
|
||||
|
@@ -29,7 +29,6 @@ struct cpuinfo_data {
|
||||
};
|
||||
|
||||
extern int root_mountflags, end_mem;
|
||||
extern int running_on_hw;
|
||||
|
||||
void setup_processor(void);
|
||||
void __init setup_arch_memory(void);
|
||||
|
@@ -59,7 +59,15 @@ struct plat_smp_ops {
|
||||
/* TBD: stop exporting it for direct population by platform */
|
||||
extern struct plat_smp_ops plat_smp_ops;
|
||||
|
||||
#endif /* CONFIG_SMP */
|
||||
#else /* CONFIG_SMP */
|
||||
|
||||
static inline void smp_init_cpus(void) {}
|
||||
static inline const char *arc_platform_smp_cpuinfo(void)
|
||||
{
|
||||
return "";
|
||||
}
|
||||
|
||||
#endif /* !CONFIG_SMP */
|
||||
|
||||
/*
|
||||
* ARC700 doesn't support atomic Read-Modify-Write ops.
|
||||
|
@@ -17,8 +17,6 @@
|
||||
|
||||
#include <linux/types.h>
|
||||
|
||||
#ifdef __KERNEL__
|
||||
|
||||
#define __HAVE_ARCH_MEMSET
|
||||
#define __HAVE_ARCH_MEMCPY
|
||||
#define __HAVE_ARCH_MEMCMP
|
||||
@@ -36,5 +34,4 @@ extern char *strcpy(char *dest, const char *src);
|
||||
extern int strcmp(const char *cs, const char *ct);
|
||||
extern __kernel_size_t strlen(const char *);
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
#endif /* _ASM_ARC_STRING_H */
|
||||
|
@@ -9,8 +9,6 @@
|
||||
#ifndef _ASM_ARC_SYSCALLS_H
|
||||
#define _ASM_ARC_SYSCALLS_H 1
|
||||
|
||||
#ifdef __KERNEL__
|
||||
|
||||
#include <linux/compiler.h>
|
||||
#include <linux/linkage.h>
|
||||
#include <linux/types.h>
|
||||
@@ -22,6 +20,4 @@ int sys_arc_gettls(void);
|
||||
|
||||
#include <asm-generic/syscalls.h>
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
|
||||
#endif
|
||||
|
@@ -16,8 +16,6 @@
|
||||
#ifndef _ASM_THREAD_INFO_H
|
||||
#define _ASM_THREAD_INFO_H
|
||||
|
||||
#ifdef __KERNEL__
|
||||
|
||||
#include <asm/page.h>
|
||||
|
||||
#ifdef CONFIG_16KSTACKS
|
||||
@@ -114,6 +112,4 @@ static inline __attribute_const__ struct thread_info *current_thread_info(void)
|
||||
* syscall, so all that reamins to be tested is _TIF_WORK_MASK
|
||||
*/
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
|
||||
#endif /* _ASM_THREAD_INFO_H */
|
||||
|
@@ -14,7 +14,7 @@
|
||||
#include <asm-generic/unaligned.h>
|
||||
#include <asm/ptrace.h>
|
||||
|
||||
#ifdef CONFIG_ARC_MISALIGN_ACCESS
|
||||
#ifdef CONFIG_ARC_EMUL_UNALIGNED
|
||||
int misaligned_fixup(unsigned long address, struct pt_regs *regs,
|
||||
struct callee_regs *cregs);
|
||||
#else
|
||||
|
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