ARM: dts: r7s72100: update sdhi clock bindings
The SDHI controller in the RZ/A1 has 2 clock sources per channel and both need to be enabled/disabled for proper operation. This fixes the fact that the define for R7S72100_CLK_SDHI1 was not correct to begin with (typo), and that all 4 clock sources need to be defined an used. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Simon Horman

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@@ -49,7 +49,9 @@
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#define R7S72100_CLK_SPI4 3
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/* MSTP12 */
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#define R7S72100_CLK_SDHI0 3
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#define R7S72100_CLK_SDHI1 2
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#define R7S72100_CLK_SDHI00 3
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#define R7S72100_CLK_SDHI01 2
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#define R7S72100_CLK_SDHI10 1
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#define R7S72100_CLK_SDHI11 0
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#endif /* __DT_BINDINGS_CLOCK_R7S72100_H__ */
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