Merge branch 'core-locking-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
* 'core-locking-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (27 commits)
rtmutex: Add missing rcu_read_unlock() in debug_rt_mutex_print_deadlock()
lockdep: Comment all warnings
lib: atomic64: Change the type of local lock to raw_spinlock_t
locking, lib/atomic64: Annotate atomic64_lock::lock as raw
locking, x86, iommu: Annotate qi->q_lock as raw
locking, x86, iommu: Annotate irq_2_ir_lock as raw
locking, x86, iommu: Annotate iommu->register_lock as raw
locking, dma, ipu: Annotate bank_lock as raw
locking, ARM: Annotate low level hw locks as raw
locking, drivers/dca: Annotate dca_lock as raw
locking, powerpc: Annotate uic->lock as raw
locking, x86: mce: Annotate cmci_discover_lock as raw
locking, ACPI: Annotate c3_lock as raw
locking, oprofile: Annotate oprofilefs lock as raw
locking, video: Annotate vga console lock as raw
locking, latencytop: Annotate latency_lock as raw
locking, timer_stats: Annotate table_lock as raw
locking, rwsem: Annotate inner lock as raw
locking, semaphores: Annotate inner lock as raw
locking, sched: Annotate thread_group_cputimer as raw
...
Fix up conflicts in kernel/posix-cpu-timers.c manually: making
cputimer->cputime a raw lock conflicted with the ABBA fix in commit
bcd5cff721
("cputimer: Cure lock inversion").
This commit is contained in:
@@ -29,7 +29,7 @@
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#define CACHE_LINE_SIZE 32
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static void __iomem *l2x0_base;
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static DEFINE_SPINLOCK(l2x0_lock);
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static DEFINE_RAW_SPINLOCK(l2x0_lock);
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static uint32_t l2x0_way_mask; /* Bitmask of active ways */
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static uint32_t l2x0_size;
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@@ -126,9 +126,9 @@ static void l2x0_cache_sync(void)
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{
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unsigned long flags;
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spin_lock_irqsave(&l2x0_lock, flags);
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raw_spin_lock_irqsave(&l2x0_lock, flags);
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cache_sync();
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spin_unlock_irqrestore(&l2x0_lock, flags);
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raw_spin_unlock_irqrestore(&l2x0_lock, flags);
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}
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static void __l2x0_flush_all(void)
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@@ -145,9 +145,9 @@ static void l2x0_flush_all(void)
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unsigned long flags;
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/* clean all ways */
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spin_lock_irqsave(&l2x0_lock, flags);
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raw_spin_lock_irqsave(&l2x0_lock, flags);
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__l2x0_flush_all();
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spin_unlock_irqrestore(&l2x0_lock, flags);
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raw_spin_unlock_irqrestore(&l2x0_lock, flags);
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}
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static void l2x0_clean_all(void)
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@@ -155,11 +155,11 @@ static void l2x0_clean_all(void)
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unsigned long flags;
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/* clean all ways */
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spin_lock_irqsave(&l2x0_lock, flags);
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raw_spin_lock_irqsave(&l2x0_lock, flags);
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writel_relaxed(l2x0_way_mask, l2x0_base + L2X0_CLEAN_WAY);
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cache_wait_way(l2x0_base + L2X0_CLEAN_WAY, l2x0_way_mask);
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cache_sync();
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spin_unlock_irqrestore(&l2x0_lock, flags);
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raw_spin_unlock_irqrestore(&l2x0_lock, flags);
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}
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static void l2x0_inv_all(void)
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@@ -167,13 +167,13 @@ static void l2x0_inv_all(void)
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unsigned long flags;
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/* invalidate all ways */
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spin_lock_irqsave(&l2x0_lock, flags);
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raw_spin_lock_irqsave(&l2x0_lock, flags);
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/* Invalidating when L2 is enabled is a nono */
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BUG_ON(readl(l2x0_base + L2X0_CTRL) & 1);
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writel_relaxed(l2x0_way_mask, l2x0_base + L2X0_INV_WAY);
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cache_wait_way(l2x0_base + L2X0_INV_WAY, l2x0_way_mask);
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cache_sync();
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spin_unlock_irqrestore(&l2x0_lock, flags);
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raw_spin_unlock_irqrestore(&l2x0_lock, flags);
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}
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static void l2x0_inv_range(unsigned long start, unsigned long end)
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@@ -181,7 +181,7 @@ static void l2x0_inv_range(unsigned long start, unsigned long end)
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void __iomem *base = l2x0_base;
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unsigned long flags;
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spin_lock_irqsave(&l2x0_lock, flags);
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raw_spin_lock_irqsave(&l2x0_lock, flags);
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if (start & (CACHE_LINE_SIZE - 1)) {
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start &= ~(CACHE_LINE_SIZE - 1);
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debug_writel(0x03);
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@@ -206,13 +206,13 @@ static void l2x0_inv_range(unsigned long start, unsigned long end)
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}
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if (blk_end < end) {
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spin_unlock_irqrestore(&l2x0_lock, flags);
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spin_lock_irqsave(&l2x0_lock, flags);
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raw_spin_unlock_irqrestore(&l2x0_lock, flags);
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raw_spin_lock_irqsave(&l2x0_lock, flags);
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}
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}
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cache_wait(base + L2X0_INV_LINE_PA, 1);
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cache_sync();
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spin_unlock_irqrestore(&l2x0_lock, flags);
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raw_spin_unlock_irqrestore(&l2x0_lock, flags);
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}
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static void l2x0_clean_range(unsigned long start, unsigned long end)
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@@ -225,7 +225,7 @@ static void l2x0_clean_range(unsigned long start, unsigned long end)
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return;
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}
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spin_lock_irqsave(&l2x0_lock, flags);
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raw_spin_lock_irqsave(&l2x0_lock, flags);
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start &= ~(CACHE_LINE_SIZE - 1);
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while (start < end) {
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unsigned long blk_end = start + min(end - start, 4096UL);
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@@ -236,13 +236,13 @@ static void l2x0_clean_range(unsigned long start, unsigned long end)
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}
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if (blk_end < end) {
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spin_unlock_irqrestore(&l2x0_lock, flags);
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spin_lock_irqsave(&l2x0_lock, flags);
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raw_spin_unlock_irqrestore(&l2x0_lock, flags);
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raw_spin_lock_irqsave(&l2x0_lock, flags);
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}
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}
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cache_wait(base + L2X0_CLEAN_LINE_PA, 1);
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cache_sync();
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spin_unlock_irqrestore(&l2x0_lock, flags);
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raw_spin_unlock_irqrestore(&l2x0_lock, flags);
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}
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static void l2x0_flush_range(unsigned long start, unsigned long end)
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@@ -255,7 +255,7 @@ static void l2x0_flush_range(unsigned long start, unsigned long end)
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return;
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}
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spin_lock_irqsave(&l2x0_lock, flags);
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raw_spin_lock_irqsave(&l2x0_lock, flags);
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start &= ~(CACHE_LINE_SIZE - 1);
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while (start < end) {
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unsigned long blk_end = start + min(end - start, 4096UL);
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@@ -268,24 +268,24 @@ static void l2x0_flush_range(unsigned long start, unsigned long end)
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debug_writel(0x00);
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if (blk_end < end) {
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spin_unlock_irqrestore(&l2x0_lock, flags);
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spin_lock_irqsave(&l2x0_lock, flags);
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raw_spin_unlock_irqrestore(&l2x0_lock, flags);
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raw_spin_lock_irqsave(&l2x0_lock, flags);
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}
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}
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cache_wait(base + L2X0_CLEAN_INV_LINE_PA, 1);
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cache_sync();
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spin_unlock_irqrestore(&l2x0_lock, flags);
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raw_spin_unlock_irqrestore(&l2x0_lock, flags);
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}
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static void l2x0_disable(void)
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{
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unsigned long flags;
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spin_lock_irqsave(&l2x0_lock, flags);
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raw_spin_lock_irqsave(&l2x0_lock, flags);
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__l2x0_flush_all();
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writel_relaxed(0, l2x0_base + L2X0_CTRL);
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dsb();
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spin_unlock_irqrestore(&l2x0_lock, flags);
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raw_spin_unlock_irqrestore(&l2x0_lock, flags);
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}
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static void l2x0_unlock(__u32 cache_id)
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@@ -16,7 +16,7 @@
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#include <asm/mmu_context.h>
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#include <asm/tlbflush.h>
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static DEFINE_SPINLOCK(cpu_asid_lock);
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static DEFINE_RAW_SPINLOCK(cpu_asid_lock);
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unsigned int cpu_last_asid = ASID_FIRST_VERSION;
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#ifdef CONFIG_SMP
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DEFINE_PER_CPU(struct mm_struct *, current_mm);
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@@ -31,7 +31,7 @@ DEFINE_PER_CPU(struct mm_struct *, current_mm);
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void __init_new_context(struct task_struct *tsk, struct mm_struct *mm)
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{
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mm->context.id = 0;
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spin_lock_init(&mm->context.id_lock);
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raw_spin_lock_init(&mm->context.id_lock);
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}
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static void flush_context(void)
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@@ -58,7 +58,7 @@ static void set_mm_context(struct mm_struct *mm, unsigned int asid)
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* the broadcast. This function is also called via IPI so the
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* mm->context.id_lock has to be IRQ-safe.
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*/
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spin_lock_irqsave(&mm->context.id_lock, flags);
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raw_spin_lock_irqsave(&mm->context.id_lock, flags);
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if (likely((mm->context.id ^ cpu_last_asid) >> ASID_BITS)) {
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/*
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* Old version of ASID found. Set the new one and
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@@ -67,7 +67,7 @@ static void set_mm_context(struct mm_struct *mm, unsigned int asid)
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mm->context.id = asid;
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cpumask_clear(mm_cpumask(mm));
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}
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spin_unlock_irqrestore(&mm->context.id_lock, flags);
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raw_spin_unlock_irqrestore(&mm->context.id_lock, flags);
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/*
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* Set the mm_cpumask(mm) bit for the current CPU.
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@@ -117,7 +117,7 @@ void __new_context(struct mm_struct *mm)
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{
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unsigned int asid;
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spin_lock(&cpu_asid_lock);
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raw_spin_lock(&cpu_asid_lock);
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#ifdef CONFIG_SMP
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/*
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* Check the ASID again, in case the change was broadcast from
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@@ -125,7 +125,7 @@ void __new_context(struct mm_struct *mm)
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*/
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if (unlikely(((mm->context.id ^ cpu_last_asid) >> ASID_BITS) == 0)) {
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cpumask_set_cpu(smp_processor_id(), mm_cpumask(mm));
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spin_unlock(&cpu_asid_lock);
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raw_spin_unlock(&cpu_asid_lock);
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return;
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}
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#endif
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@@ -153,5 +153,5 @@ void __new_context(struct mm_struct *mm)
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}
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set_mm_context(mm, asid);
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spin_unlock(&cpu_asid_lock);
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raw_spin_unlock(&cpu_asid_lock);
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}
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@@ -30,7 +30,7 @@
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#define minicache_pgprot __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | \
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L_PTE_MT_MINICACHE)
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static DEFINE_SPINLOCK(minicache_lock);
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static DEFINE_RAW_SPINLOCK(minicache_lock);
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/*
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* ARMv4 mini-dcache optimised copy_user_highpage
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@@ -76,14 +76,14 @@ void v4_mc_copy_user_highpage(struct page *to, struct page *from,
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if (!test_and_set_bit(PG_dcache_clean, &from->flags))
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__flush_dcache_page(page_mapping(from), from);
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spin_lock(&minicache_lock);
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raw_spin_lock(&minicache_lock);
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set_pte_ext(TOP_PTE(0xffff8000), pfn_pte(page_to_pfn(from), minicache_pgprot), 0);
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flush_tlb_kernel_page(0xffff8000);
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mc_copy_user_page((void *)0xffff8000, kto);
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spin_unlock(&minicache_lock);
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raw_spin_unlock(&minicache_lock);
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kunmap_atomic(kto, KM_USER1);
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}
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@@ -27,7 +27,7 @@
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#define from_address (0xffff8000)
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#define to_address (0xffffc000)
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static DEFINE_SPINLOCK(v6_lock);
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static DEFINE_RAW_SPINLOCK(v6_lock);
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/*
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* Copy the user page. No aliasing to deal with so we can just
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@@ -88,7 +88,7 @@ static void v6_copy_user_highpage_aliasing(struct page *to,
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* Now copy the page using the same cache colour as the
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* pages ultimate destination.
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*/
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spin_lock(&v6_lock);
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raw_spin_lock(&v6_lock);
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set_pte_ext(TOP_PTE(from_address) + offset, pfn_pte(page_to_pfn(from), PAGE_KERNEL), 0);
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set_pte_ext(TOP_PTE(to_address) + offset, pfn_pte(page_to_pfn(to), PAGE_KERNEL), 0);
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@@ -101,7 +101,7 @@ static void v6_copy_user_highpage_aliasing(struct page *to,
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copy_page((void *)kto, (void *)kfrom);
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spin_unlock(&v6_lock);
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raw_spin_unlock(&v6_lock);
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}
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/*
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@@ -121,13 +121,13 @@ static void v6_clear_user_highpage_aliasing(struct page *page, unsigned long vad
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* Now clear the page using the same cache colour as
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* the pages ultimate destination.
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*/
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spin_lock(&v6_lock);
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raw_spin_lock(&v6_lock);
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set_pte_ext(TOP_PTE(to_address) + offset, pfn_pte(page_to_pfn(page), PAGE_KERNEL), 0);
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flush_tlb_kernel_page(to);
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clear_page((void *)to);
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spin_unlock(&v6_lock);
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raw_spin_unlock(&v6_lock);
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}
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struct cpu_user_fns v6_user_fns __initdata = {
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@@ -32,7 +32,7 @@
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#define minicache_pgprot __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | \
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L_PTE_MT_MINICACHE)
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static DEFINE_SPINLOCK(minicache_lock);
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static DEFINE_RAW_SPINLOCK(minicache_lock);
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/*
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* XScale mini-dcache optimised copy_user_highpage
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@@ -98,14 +98,14 @@ void xscale_mc_copy_user_highpage(struct page *to, struct page *from,
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if (!test_and_set_bit(PG_dcache_clean, &from->flags))
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__flush_dcache_page(page_mapping(from), from);
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spin_lock(&minicache_lock);
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raw_spin_lock(&minicache_lock);
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set_pte_ext(TOP_PTE(COPYPAGE_MINICACHE), pfn_pte(page_to_pfn(from), minicache_pgprot), 0);
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flush_tlb_kernel_page(COPYPAGE_MINICACHE);
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mc_copy_user_page((void *)COPYPAGE_MINICACHE, kto);
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spin_unlock(&minicache_lock);
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raw_spin_unlock(&minicache_lock);
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kunmap_atomic(kto, KM_USER1);
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}
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Reference in New Issue
Block a user