thunderbolt: Add support for Intel Ice Lake
The Thunderbolt controller is integrated into the Ice Lake CPU itself and requires special flows to power it on and off using force power bit in NHI VSEC registers. Runtime PM (RTD3) and Sx flows also differ from the discrete solutions. Now the firmware notifies the driver whether RTD3 entry or exit are possible. The driver is responsible of sending Go2Sx command through link controller mailbox when system enters Sx states (suspend-to-mem/disk). Rest of the ICM firwmare flows follow Titan Ridge. Signed-off-by: Raanan Avargil <raanan.avargil@intel.com> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Yehezkel Bernat <YehezkelShB@gmail.com> Tested-by: Mario Limonciello <mario.limonciello@dell.com>
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@@ -429,6 +429,7 @@ static inline struct tb_xdomain *tb_service_parent(struct tb_service *svc)
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* @lock: Must be held during ring creation/destruction. Is acquired by
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* interrupt_work when dispatching interrupts to individual rings.
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* @pdev: Pointer to the PCI device
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* @ops: NHI specific optional ops
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* @iobase: MMIO space of the NHI
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* @tx_rings: All Tx rings available on this host controller
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* @rx_rings: All Rx rings available on this host controller
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@@ -442,6 +443,7 @@ static inline struct tb_xdomain *tb_service_parent(struct tb_service *svc)
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struct tb_nhi {
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spinlock_t lock;
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struct pci_dev *pdev;
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const struct tb_nhi_ops *ops;
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void __iomem *iobase;
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struct tb_ring **tx_rings;
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struct tb_ring **rx_rings;
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