thunderbolt: Add support for Intel Ice Lake
The Thunderbolt controller is integrated into the Ice Lake CPU itself and requires special flows to power it on and off using force power bit in NHI VSEC registers. Runtime PM (RTD3) and Sx flows also differ from the discrete solutions. Now the firmware notifies the driver whether RTD3 entry or exit are possible. The driver is responsible of sending Go2Sx command through link controller mailbox when system enters Sx states (suspend-to-mem/disk). Rest of the ICM firwmare flows follow Titan Ridge. Signed-off-by: Raanan Avargil <raanan.avargil@intel.com> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Yehezkel Bernat <YehezkelShB@gmail.com> Tested-by: Mario Limonciello <mario.limonciello@dell.com>
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@@ -1470,6 +1470,8 @@ static int tb_switch_get_generation(struct tb_switch *sw)
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case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_2C_BRIDGE:
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case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_4C_BRIDGE:
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case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_DD_BRIDGE:
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case PCI_DEVICE_ID_INTEL_ICL_NHI0:
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case PCI_DEVICE_ID_INTEL_ICL_NHI1:
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return 3;
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default:
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