xiaomi-sm8450/android_kernel_xiaomi_sm8450
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Merge master.kernel.org:/pub/scm/linux/kernel/git/bart/ide-2.6

Browse Source 
* master.kernel.org:/pub/scm/linux/kernel/git/bart/ide-2.6:
  ide: fix PIO setup on resume for ATAPI devices
  ide: legacy PCI bus order probing fixes
  ide: add ide_proc_register_port()
  ide: add "initializing" argument to ide_register_hw()
  ide: cable detection fixes (take 2)
  ide: move IDE settings handling to ide-proc.c
  ide: split off ioctl handling from IDE settings (v2)
  ide: make /proc/ide/ optional
  ide: add ide_tune_dma() helper
  ide: rework the code for selecting the best DMA transfer mode (v3)
  ide: fix UDMA/MWDMA/SWDMA masks (v3)
This commit is contained in:
Linus Torvalds
2007-05-09 15:41:31 -07:00
parent d0b6e0e380 317a46a200
commit 3cb7396b7b
63 changed files with 1108 additions and 1465 deletions
Download Patch File Download Diff File Expand all files Collapse all files

45
drivers/ide/pci/siimage.c
View File

@@ -122,45 +122,41 @@ static inline unsigned long siimage_seldev(ide_drive_t *drive, int r)
}
/**
* siimage_ratemask - Compute available modes
* @drive: IDE drive
* sil_udma_filter - compute UDMA mask
* @drive: IDE device
*
* Compute the available UDMA speeds for the device on the interface.
*
* Compute the available speeds for the devices on the interface.
* For the CMD680 this depends on the clocking mode (scsc), for the
* SI3312 SATA controller life is a bit simpler. Enforce UDMA33
* as a limit if there is no 80pin cable present.
* SI3112 SATA controller life is a bit simpler.
*/
static byte siimage_ratemask (ide_drive_t *drive)
static u8 sil_udma_filter(ide_drive_t *drive)
{
ide_hwif_t *hwif = HWIF(drive);
u8 mode = 0, scsc = 0;
ide_hwif_t *hwif = drive->hwif;
unsigned long base = (unsigned long) hwif->hwif_data;
u8 mask = 0, scsc = 0;
if (hwif->mmio)
scsc = hwif->INB(base + 0x4A);
else
pci_read_config_byte(hwif->pci_dev, 0x8A, &scsc);
if(is_sata(hwif))
{
if(strstr(drive->id->model, "Maxtor"))
return 3;
return 4;
if (is_sata(hwif)) {
mask = strstr(drive->id->model, "Maxtor") ? 0x3f : 0x7f;
goto out;
}
if ((scsc & 0x30) == 0x10) /* 133 */
mode = 4;
mask = 0x7f;
else if ((scsc & 0x30) == 0x20) /* 2xPCI */
mode = 4;
mask = 0x7f;
else if ((scsc & 0x30) == 0x00) /* 100 */
mode = 3;
mask = 0x3f;
else /* Disabled ? */
BUG();
if (!eighty_ninty_three(drive))
mode = min(mode, (u8)1);
return mode;
out:
return mask;
}
/**
@@ -306,7 +302,7 @@ static int siimage_tune_chipset (ide_drive_t *drive, byte xferspeed)
ide_hwif_t *hwif = HWIF(drive);
u16 ultra = 0, multi = 0;
u8 mode = 0, unit = drive->select.b.unit;
u8 speed = ide_rate_filter(siimage_ratemask(drive), xferspeed);
u8 speed = ide_rate_filter(drive, xferspeed);
unsigned long base = (unsigned long)hwif->hwif_data;
u8 scsc = 0, addr_mask = ((hwif->channel) ?
((hwif->mmio) ? 0xF4 : 0x84) :
@@ -389,7 +385,7 @@ static int siimage_tune_chipset (ide_drive_t *drive, byte xferspeed)
static int config_chipset_for_dma (ide_drive_t *drive)
{
u8 speed = ide_dma_speed(drive, siimage_ratemask(drive));
u8 speed = ide_max_dma_mode(drive);
if (!speed)
return 0;
@@ -989,6 +985,7 @@ static void __devinit init_hwif_siimage(ide_hwif_t *hwif)
hwif->tuneproc = &siimage_tuneproc;
hwif->reset_poll = &siimage_reset_poll;
hwif->pre_reset = &siimage_pre_reset;
hwif->udma_filter = &sil_udma_filter;
if(is_sata(hwif)) {
static int first = 1;