IB/hfi1: Right size user_sdma sequence numbers and related variables
Hardware limits the maximum number of packets to u16 packets. Match that size for all relevant sequence numbers in the user_sdma engine. Reviewed-by: Mike Marciniszyn <mike.marciniszyn@intel.com> Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com> Signed-off-by: Dennis Dalessandro <dennis.dalessandro@intel.com> Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
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Jason Gunthorpe

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@@ -2444,7 +2444,7 @@ nodesc:
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* @sde: sdma engine to use
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* @wait: wait structure to use when full (may be NULL)
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* @tx_list: list of sdma_txreqs to submit
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* @count: pointer to a u32 which, after return will contain the total number of
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* @count: pointer to a u16 which, after return will contain the total number of
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* sdma_txreqs removed from the tx_list. This will include sdma_txreqs
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* whose SDMA descriptors are submitted to the ring and the sdma_txreqs
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* which are added to SDMA engine flush list if the SDMA engine state is
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@@ -2468,7 +2468,7 @@ nodesc:
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* -EIOCBQUEUED - tx queued to iowait, -ECOMM bad sdma state
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*/
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int sdma_send_txlist(struct sdma_engine *sde, struct iowait *wait,
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struct list_head *tx_list, u32 *count_out)
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struct list_head *tx_list, u16 *count_out)
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{
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struct sdma_txreq *tx, *tx_next;
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int ret = 0;
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