Merge git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: (32 commits) sh: intc: switch irq_desc iteration to new active IRQ iterator. sh: fix up cpu hotplug IRQ migration for irq_data changes. sh: oprofile: Make sure the backtrace op is available for timer-fallback. sh64: oprofile: Fix up kernel stack pointer size mismatch. sh: oprofile: Fix up and extend op_name_from_perf_id(). sh: lockless get_user_pages_fast() sh64: _PAGE_SPECIAL support. sound: sh: ctrl_in/outX to __raw_read/writeX conversion. sh: disable deprecated genirq support. sh: update show_interrupts() for irq_data chip lookup. sh: intc: irq_data conversion. sh64: irq_data conversion. sh64: update for IRQ flag handling naming changes. rtc: rtc-rs5c313: ctrl_in/outX to __raw_read/writeX conversion. sh: mach-se: irq_data conversion. input: hp680_ts_input: ctrl_in/outX to __raw_read/writeX conversion. input: jornada680_kbd: ctrl_in/outX to __raw_read/writeX conversion. sh: hd64461: irq_data conversion. sh: mach-x3proto: irq_data conversion. sh: mach-systemh: irq_data conversion. ...
此提交包含在:
@@ -80,21 +80,21 @@
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/* SCSPTR1 data */
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unsigned char scsptr1_data;
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#define RS5C313_CEENABLE ctrl_outb(RS5C313_CE_RTCCE, RS5C313_CE);
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#define RS5C313_CEDISABLE ctrl_outb(0x00, RS5C313_CE)
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#define RS5C313_MISCOP ctrl_outb(0x02, 0xB0000008)
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#define RS5C313_CEENABLE __raw_writeb(RS5C313_CE_RTCCE, RS5C313_CE);
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#define RS5C313_CEDISABLE __raw_writeb(0x00, RS5C313_CE)
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#define RS5C313_MISCOP __raw_writeb(0x02, 0xB0000008)
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static void rs5c313_init_port(void)
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{
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/* Set SCK as I/O port and Initialize SCSPTR1 data & I/O port. */
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ctrl_outb(ctrl_inb(SCSMR1) & ~SCSMR1_CA, SCSMR1);
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ctrl_outb(ctrl_inb(SCSCR1) & ~SCSCR1_CKE, SCSCR1);
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__raw_writeb(__raw_readb(SCSMR1) & ~SCSMR1_CA, SCSMR1);
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__raw_writeb(__raw_readb(SCSCR1) & ~SCSCR1_CKE, SCSCR1);
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/* And Initialize SCL for RS5C313 clock */
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scsptr1_data = ctrl_inb(SCSPTR1) | SCL; /* SCL:H */
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ctrl_outb(scsptr1_data, SCSPTR1);
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scsptr1_data = ctrl_inb(SCSPTR1) | SCL_OEN; /* SCL output enable */
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ctrl_outb(scsptr1_data, SCSPTR1);
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scsptr1_data = __raw_readb(SCSPTR1) | SCL; /* SCL:H */
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__raw_writeb(scsptr1_data, SCSPTR1);
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scsptr1_data = __raw_readb(SCSPTR1) | SCL_OEN; /* SCL output enable */
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__raw_writeb(scsptr1_data, SCSPTR1);
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RS5C313_CEDISABLE; /* CE:L */
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}
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@@ -106,21 +106,21 @@ static void rs5c313_write_data(unsigned char data)
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/* SDA:Write Data */
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scsptr1_data = (scsptr1_data & ~SDA) |
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((((0x80 >> i) & data) >> (7 - i)) << 2);
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ctrl_outb(scsptr1_data, SCSPTR1);
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__raw_writeb(scsptr1_data, SCSPTR1);
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if (i == 0) {
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scsptr1_data |= SDA_OEN; /* SDA:output enable */
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ctrl_outb(scsptr1_data, SCSPTR1);
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__raw_writeb(scsptr1_data, SCSPTR1);
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}
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ndelay(700);
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scsptr1_data &= ~SCL; /* SCL:L */
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ctrl_outb(scsptr1_data, SCSPTR1);
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__raw_writeb(scsptr1_data, SCSPTR1);
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ndelay(700);
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scsptr1_data |= SCL; /* SCL:H */
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ctrl_outb(scsptr1_data, SCSPTR1);
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__raw_writeb(scsptr1_data, SCSPTR1);
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}
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scsptr1_data &= ~SDA_OEN; /* SDA:output disable */
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ctrl_outb(scsptr1_data, SCSPTR1);
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__raw_writeb(scsptr1_data, SCSPTR1);
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}
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static unsigned char rs5c313_read_data(void)
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@@ -131,12 +131,12 @@ static unsigned char rs5c313_read_data(void)
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for (i = 0; i < 8; i++) {
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ndelay(700);
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/* SDA:Read Data */
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data |= ((ctrl_inb(SCSPTR1) & SDA) >> 2) << (7 - i);
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data |= ((__raw_readb(SCSPTR1) & SDA) >> 2) << (7 - i);
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scsptr1_data &= ~SCL; /* SCL:L */
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ctrl_outb(scsptr1_data, SCSPTR1);
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__raw_writeb(scsptr1_data, SCSPTR1);
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ndelay(700);
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scsptr1_data |= SCL; /* SCL:H */
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ctrl_outb(scsptr1_data, SCSPTR1);
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__raw_writeb(scsptr1_data, SCSPTR1);
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}
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return data & 0x0F;
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}
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