Merge tag 'pci-v4.17-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci
Pull PCI updates from Bjorn Helgaas: - move pci_uevent_ers() out of pci.h (Michael Ellerman) - skip ASPM common clock warning if BIOS already configured it (Sinan Kaya) - fix ASPM Coverity warning about threshold_ns (Gustavo A. R. Silva) - remove last user of pci_get_bus_and_slot() and the function itself (Sinan Kaya) - add decoding for 16 GT/s link speed (Jay Fang) - add interfaces to get max link speed and width (Tal Gilboa) - add pcie_bandwidth_capable() to compute max supported link bandwidth (Tal Gilboa) - add pcie_bandwidth_available() to compute bandwidth available to device (Tal Gilboa) - add pcie_print_link_status() to log link speed and whether it's limited (Tal Gilboa) - use PCI core interfaces to report when device performance may be limited by its slot instead of doing it in each driver (Tal Gilboa) - fix possible cpqphp NULL pointer dereference (Shawn Lin) - rescan more of the hierarchy on ACPI hotplug to fix Thunderbolt/xHCI hotplug (Mika Westerberg) - add support for PCI I/O port space that's neither directly accessible via CPU in/out instructions nor directly mapped into CPU physical memory space. This is fairly intrusive and includes minor changes to interfaces used for I/O space on most platforms (Zhichang Yuan, John Garry) - add support for HiSilicon Hip06/Hip07 LPC I/O space (Zhichang Yuan, John Garry) - use PCI_EXP_DEVCTL2_COMP_TIMEOUT in rapidio/tsi721 (Bjorn Helgaas) - remove possible NULL pointer dereference in of_pci_bus_find_domain_nr() (Shawn Lin) - report quirk timings with dev_info (Bjorn Helgaas) - report quirks that take longer than 10ms (Bjorn Helgaas) - add and use Altera Vendor ID (Johannes Thumshirn) - tidy Makefiles and comments (Bjorn Helgaas) - don't set up INTx if MSI or MSI-X is enabled to align cris, frv, ia64, and mn10300 with x86 (Bjorn Helgaas) - move pcieport_if.h to drivers/pci/pcie/ to encapsulate it (Frederick Lawler) - merge pcieport_if.h into portdrv.h (Bjorn Helgaas) - move workaround for BIOS PME issue from portdrv to PCI core (Bjorn Helgaas) - completely disable portdrv with "pcie_ports=compat" (Bjorn Helgaas) - remove portdrv link order dependency (Bjorn Helgaas) - remove support for unused VC portdrv service (Bjorn Helgaas) - simplify portdrv feature permission checking (Bjorn Helgaas) - remove "pcie_hp=nomsi" parameter (use "pci=nomsi" instead) (Bjorn Helgaas) - remove unnecessary "pcie_ports=auto" parameter (Bjorn Helgaas) - use cached AER capability offset (Frederick Lawler) - don't enable DPC if BIOS hasn't granted AER control (Mika Westerberg) - rename pcie-dpc.c to dpc.c (Bjorn Helgaas) - use generic pci_mmap_resource_range() instead of powerpc and xtensa arch-specific versions (David Woodhouse) - support arbitrary PCI host bridge offsets on sparc (Yinghai Lu) - remove System and Video ROM reservations on sparc (Bjorn Helgaas) - probe for device reset support during enumeration instead of runtime (Bjorn Helgaas) - add ACS quirk for Ampere (née APM) root ports (Feng Kan) - add function 1 DMA alias quirk for Marvell 88SE9220 (Thomas Vincent-Cross) - protect device restore with device lock (Sinan Kaya) - handle failure of FLR gracefully (Sinan Kaya) - handle CRS (config retry status) after device resets (Sinan Kaya) - skip various config reads for SR-IOV VFs as an optimization (KarimAllah Ahmed) - consolidate VPD code in vpd.c (Bjorn Helgaas) - add Tegra dependency on PCI_MSI_IRQ_DOMAIN (Arnd Bergmann) - add DT support for R-Car r8a7743 (Biju Das) - fix a PCI_EJECT vs PCI_BUS_RELATIONS race condition in Hyper-V host bridge driver that causes a general protection fault (Dexuan Cui) - fix Hyper-V host bridge hang in MSI setup on 1-vCPU VMs with SR-IOV (Dexuan Cui) - fix Hyper-V host bridge hang when ejecting a VF before setting up MSI (Dexuan Cui) - make several structures static (Fengguang Wu) - increase number of MSI IRQs supported by Synopsys DesignWare bridges from 32 to 256 (Gustavo Pimentel) - implemented multiplexed IRQ domain API and remove obsolete MSI IRQ API from DesignWare drivers (Gustavo Pimentel) - add Tegra power management support (Manikanta Maddireddy) - add Tegra loadable module support (Manikanta Maddireddy) - handle 64-bit BARs correctly in endpoint support (Niklas Cassel) - support optional regulator for HiSilicon STB (Shawn Guo) - use regulator bulk API for Qualcomm apq8064 (Srinivas Kandagatla) - support power supplies for Qualcomm msm8996 (Srinivas Kandagatla) * tag 'pci-v4.17-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (123 commits) MAINTAINERS: Add John Garry as maintainer for HiSilicon LPC driver HISI LPC: Add ACPI support ACPI / scan: Do not enumerate Indirect IO host children ACPI / scan: Rename acpi_is_serial_bus_slave() for more general use HISI LPC: Support the LPC host on Hip06/Hip07 with DT bindings of: Add missing I/O range exception for indirect-IO devices PCI: Apply the new generic I/O management on PCI IO hosts PCI: Add fwnode handler as input param of pci_register_io_range() PCI: Remove __weak tag from pci_register_io_range() MAINTAINERS: Add missing /drivers/pci/cadence directory entry fm10k: Report PCIe link properties with pcie_print_link_status() net/mlx5e: Use pcie_bandwidth_available() to compute bandwidth net/mlx5: Report PCIe link properties with pcie_print_link_status() net/mlx4_core: Report PCIe link properties with pcie_print_link_status() PCI: Add pcie_print_link_status() to log link speed and whether it's limited PCI: Add pcie_bandwidth_available() to compute bandwidth available to device misc: pci_endpoint_test: Handle 64-bit BARs properly PCI: designware-ep: Make dw_pcie_ep_reset_bar() handle 64-bit BARs properly PCI: endpoint: Make sure that BAR_5 does not have 64-bit flag set when clearing PCI: endpoint: Make epc->ops->clear_bar()/pci_epc_clear_bar() take struct *epf_bar ...
This commit is contained in:
Linus Torvalds
@@ -256,6 +256,7 @@ enum pci_bus_speed {
|
||||
PCIE_SPEED_2_5GT = 0x14,
|
||||
PCIE_SPEED_5_0GT = 0x15,
|
||||
PCIE_SPEED_8_0GT = 0x16,
|
||||
PCIE_SPEED_16_0GT = 0x17,
|
||||
PCI_SPEED_UNKNOWN = 0xff,
|
||||
};
|
||||
|
||||
@@ -469,6 +470,9 @@ struct pci_host_bridge {
|
||||
struct msi_controller *msi;
|
||||
unsigned int ignore_reset_delay:1; /* For entire hierarchy */
|
||||
unsigned int no_ext_tags:1; /* No Extended Tags */
|
||||
unsigned int native_aer:1; /* OS may use PCIe AER */
|
||||
unsigned int native_hotplug:1; /* OS may use PCIe hotplug */
|
||||
unsigned int native_pme:1; /* OS may use PCIe PME */
|
||||
/* Resource alignment requirements */
|
||||
resource_size_t (*align_resource)(struct pci_dev *dev,
|
||||
const struct resource *res,
|
||||
@@ -949,11 +953,6 @@ struct pci_dev *pci_get_subsys(unsigned int vendor, unsigned int device,
|
||||
struct pci_dev *pci_get_slot(struct pci_bus *bus, unsigned int devfn);
|
||||
struct pci_dev *pci_get_domain_bus_and_slot(int domain, unsigned int bus,
|
||||
unsigned int devfn);
|
||||
static inline struct pci_dev *pci_get_bus_and_slot(unsigned int bus,
|
||||
unsigned int devfn)
|
||||
{
|
||||
return pci_get_domain_bus_and_slot(0, bus, devfn);
|
||||
}
|
||||
struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from);
|
||||
int pci_dev_present(const struct pci_device_id *ids);
|
||||
|
||||
@@ -1082,7 +1081,11 @@ int pcie_get_mps(struct pci_dev *dev);
|
||||
int pcie_set_mps(struct pci_dev *dev, int mps);
|
||||
int pcie_get_minimum_link(struct pci_dev *dev, enum pci_bus_speed *speed,
|
||||
enum pcie_link_width *width);
|
||||
void pcie_flr(struct pci_dev *dev);
|
||||
u32 pcie_bandwidth_available(struct pci_dev *dev, struct pci_dev **limiting_dev,
|
||||
enum pci_bus_speed *speed,
|
||||
enum pcie_link_width *width);
|
||||
void pcie_print_link_status(struct pci_dev *dev);
|
||||
int pcie_flr(struct pci_dev *dev);
|
||||
int __pci_reset_function_locked(struct pci_dev *dev);
|
||||
int pci_reset_function(struct pci_dev *dev);
|
||||
int pci_reset_function_locked(struct pci_dev *dev);
|
||||
@@ -1095,7 +1098,7 @@ int pci_reset_bus(struct pci_bus *bus);
|
||||
int pci_try_reset_bus(struct pci_bus *bus);
|
||||
void pci_reset_secondary_bus(struct pci_dev *dev);
|
||||
void pcibios_reset_secondary_bus(struct pci_dev *dev);
|
||||
void pci_reset_bridge_secondary_bus(struct pci_dev *dev);
|
||||
int pci_reset_bridge_secondary_bus(struct pci_dev *dev);
|
||||
void pci_update_resource(struct pci_dev *dev, int resno);
|
||||
int __must_check pci_assign_resource(struct pci_dev *dev, int i);
|
||||
int __must_check pci_reassign_resource(struct pci_dev *dev, int i, resource_size_t add_size, resource_size_t align);
|
||||
@@ -1228,7 +1231,8 @@ int __must_check pci_bus_alloc_resource(struct pci_bus *bus,
|
||||
void *alignf_data);
|
||||
|
||||
|
||||
int pci_register_io_range(phys_addr_t addr, resource_size_t size);
|
||||
int pci_register_io_range(struct fwnode_handle *fwnode, phys_addr_t addr,
|
||||
resource_size_t size);
|
||||
unsigned long pci_address_to_pio(phys_addr_t addr);
|
||||
phys_addr_t pci_pio_to_address(unsigned long pio);
|
||||
int pci_remap_iospace(const struct resource *res, phys_addr_t phys_addr);
|
||||
@@ -1297,7 +1301,6 @@ unsigned char pci_bus_max_busnr(struct pci_bus *bus);
|
||||
void pci_setup_bridge(struct pci_bus *bus);
|
||||
resource_size_t pcibios_window_alignment(struct pci_bus *bus,
|
||||
unsigned long type);
|
||||
resource_size_t pcibios_iov_resource_alignment(struct pci_dev *dev, int resno);
|
||||
|
||||
#define PCI_VGA_STATE_CHANGE_BRIDGE (1 << 0)
|
||||
#define PCI_VGA_STATE_CHANGE_DECODES (1 << 1)
|
||||
@@ -1448,10 +1451,8 @@ static inline int pci_irqd_intx_xlate(struct irq_domain *d,
|
||||
|
||||
#ifdef CONFIG_PCIEPORTBUS
|
||||
extern bool pcie_ports_disabled;
|
||||
extern bool pcie_ports_auto;
|
||||
#else
|
||||
#define pcie_ports_disabled true
|
||||
#define pcie_ports_auto false
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PCIEASPM
|
||||
@@ -1663,9 +1664,6 @@ static inline struct pci_bus *pci_find_next_bus(const struct pci_bus *from)
|
||||
static inline struct pci_dev *pci_get_slot(struct pci_bus *bus,
|
||||
unsigned int devfn)
|
||||
{ return NULL; }
|
||||
static inline struct pci_dev *pci_get_bus_and_slot(unsigned int bus,
|
||||
unsigned int devfn)
|
||||
{ return NULL; }
|
||||
static inline struct pci_dev *pci_get_domain_bus_and_slot(int domain,
|
||||
unsigned int bus, unsigned int devfn)
|
||||
{ return NULL; }
|
||||
@@ -1925,6 +1923,7 @@ void pcibios_release_device(struct pci_dev *dev);
|
||||
void pcibios_penalize_isa_irq(int irq, int active);
|
||||
int pcibios_alloc_irq(struct pci_dev *dev);
|
||||
void pcibios_free_irq(struct pci_dev *dev);
|
||||
resource_size_t pcibios_default_alignment(void);
|
||||
|
||||
#ifdef CONFIG_HIBERNATE_CALLBACKS
|
||||
extern struct dev_pm_ops pcibios_pm_ops;
|
||||
@@ -1957,6 +1956,11 @@ int pci_sriov_set_totalvfs(struct pci_dev *dev, u16 numvfs);
|
||||
int pci_sriov_get_totalvfs(struct pci_dev *dev);
|
||||
resource_size_t pci_iov_resource_size(struct pci_dev *dev, int resno);
|
||||
void pci_vf_drivers_autoprobe(struct pci_dev *dev, bool probe);
|
||||
|
||||
/* Arch may override these (weak) */
|
||||
int pcibios_sriov_enable(struct pci_dev *pdev, u16 num_vfs);
|
||||
int pcibios_sriov_disable(struct pci_dev *pdev);
|
||||
resource_size_t pcibios_iov_resource_alignment(struct pci_dev *dev, int resno);
|
||||
#else
|
||||
static inline int pci_iov_virtfn_bus(struct pci_dev *dev, int id)
|
||||
{
|
||||
@@ -2184,6 +2188,21 @@ int pci_parse_request_of_pci_ranges(struct device *dev,
|
||||
/* Arch may override this (weak) */
|
||||
struct device_node *pcibios_get_phb_of_node(struct pci_bus *bus);
|
||||
|
||||
#else /* CONFIG_OF */
|
||||
static inline void pci_set_of_node(struct pci_dev *dev) { }
|
||||
static inline void pci_release_of_node(struct pci_dev *dev) { }
|
||||
static inline void pci_set_bus_of_node(struct pci_bus *bus) { }
|
||||
static inline void pci_release_bus_of_node(struct pci_bus *bus) { }
|
||||
static inline struct irq_domain *
|
||||
pci_host_bridge_of_msi_domain(struct pci_bus *bus) { return NULL; }
|
||||
static inline int pci_parse_request_of_pci_ranges(struct device *dev,
|
||||
struct list_head *resources,
|
||||
struct resource **bus_range)
|
||||
{
|
||||
return -EINVAL;
|
||||
}
|
||||
#endif /* CONFIG_OF */
|
||||
|
||||
static inline struct device_node *
|
||||
pci_device_to_OF_node(const struct pci_dev *pdev)
|
||||
{
|
||||
@@ -2195,23 +2214,6 @@ static inline struct device_node *pci_bus_to_OF_node(struct pci_bus *bus)
|
||||
return bus ? bus->dev.of_node : NULL;
|
||||
}
|
||||
|
||||
#else /* CONFIG_OF */
|
||||
static inline void pci_set_of_node(struct pci_dev *dev) { }
|
||||
static inline void pci_release_of_node(struct pci_dev *dev) { }
|
||||
static inline void pci_set_bus_of_node(struct pci_bus *bus) { }
|
||||
static inline void pci_release_bus_of_node(struct pci_bus *bus) { }
|
||||
static inline struct device_node *
|
||||
pci_device_to_OF_node(const struct pci_dev *pdev) { return NULL; }
|
||||
static inline struct irq_domain *
|
||||
pci_host_bridge_of_msi_domain(struct pci_bus *bus) { return NULL; }
|
||||
static inline int pci_parse_request_of_pci_ranges(struct device *dev,
|
||||
struct list_head *resources,
|
||||
struct resource **bus_range)
|
||||
{
|
||||
return -EINVAL;
|
||||
}
|
||||
#endif /* CONFIG_OF */
|
||||
|
||||
#ifdef CONFIG_ACPI
|
||||
struct irq_domain *pci_host_bridge_acpi_msi_domain(struct pci_bus *bus);
|
||||
|
||||
@@ -2282,41 +2284,9 @@ static inline bool pci_is_thunderbolt_attached(struct pci_dev *pdev)
|
||||
return false;
|
||||
}
|
||||
|
||||
/**
|
||||
* pci_uevent_ers - emit a uevent during recovery path of pci device
|
||||
* @pdev: pci device to check
|
||||
* @err_type: type of error event
|
||||
*
|
||||
*/
|
||||
static inline void pci_uevent_ers(struct pci_dev *pdev,
|
||||
enum pci_ers_result err_type)
|
||||
{
|
||||
int idx = 0;
|
||||
char *envp[3];
|
||||
|
||||
switch (err_type) {
|
||||
case PCI_ERS_RESULT_NONE:
|
||||
case PCI_ERS_RESULT_CAN_RECOVER:
|
||||
envp[idx++] = "ERROR_EVENT=BEGIN_RECOVERY";
|
||||
envp[idx++] = "DEVICE_ONLINE=0";
|
||||
break;
|
||||
case PCI_ERS_RESULT_RECOVERED:
|
||||
envp[idx++] = "ERROR_EVENT=SUCCESSFUL_RECOVERY";
|
||||
envp[idx++] = "DEVICE_ONLINE=1";
|
||||
break;
|
||||
case PCI_ERS_RESULT_DISCONNECT:
|
||||
envp[idx++] = "ERROR_EVENT=FAILED_RECOVERY";
|
||||
envp[idx++] = "DEVICE_ONLINE=0";
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
if (idx > 0) {
|
||||
envp[idx++] = NULL;
|
||||
kobject_uevent_env(&pdev->dev.kobj, KOBJ_CHANGE, envp);
|
||||
}
|
||||
}
|
||||
#if defined(CONFIG_PCIEAER) || defined(CONFIG_EEH)
|
||||
void pci_uevent_ers(struct pci_dev *pdev, enum pci_ers_result err_type);
|
||||
#endif
|
||||
|
||||
/* Provide the legacy pci_dma_* API */
|
||||
#include <linux/pci-dma-compat.h>
|
||||
|
||||
Reference in New Issue
Block a user