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MIPS: Use WSBH/DSBH/DSHD on Loongson 3A

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Signed-off-by: chenj <chenj@lemote.com>
Cc: linux-mips@linux-mips.org
Cc: chenhc@lemote.com
Patchwork: https://patchwork.linux-mips.org/patch/7542/
Patchwork: https://patchwork.linux-mips.org/patch/7550/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Chen Jie
2014-08-15 16:56:58 +08:00
committed by Ralf Baechle
parent 0f33be009b
commit 3c09bae43b
6 changed files with 36 additions and 7 deletions
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arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h
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@@ -57,6 +57,7 @@
#define cpu_has_vint 0
#define cpu_has_veic 0
#define cpu_hwrena_impl_bits 0xc0000000
#define cpu_has_wsbh 1
#define cpu_has_rixi (cpu_data[0].cputype != CPU_CAVIUM_OCTEON)