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MIPS: Netlogic: Avoid using fixed PIC IRT index

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The index for a device interrupt in the PIC interrupt routing table
changes for different chips in the XLP family.  Avoid using the fixed
entries and derive the index value from the SoC device header.

Add workarounds for some devices which do not report the IRT index
correctly.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/5025/
Acked-by: John Crispin <blogic@openwrt.org>
This commit is contained in:
Jayachandran C
2013-03-23 17:27:56 +00:00
committed by Ralf Baechle
parent 62b734d289
commit 3c0553e734
2 changed files with 40 additions and 75 deletions
Download Patch File Download Diff File Expand all files Collapse all files

62
arch/mips/netlogic/xlp/nlm_hal.c
View File

@@ -61,43 +61,61 @@ void nlm_node_init(int node)
int nlm_irq_to_irt(int irq)
{
if (!PIC_IRQ_IS_IRT(irq))
return -1;
uint64_t pcibase;
int devoff, irt;
switch (irq) {
case PIC_UART_0_IRQ:
return PIC_IRT_UART_0_INDEX;
devoff = XLP_IO_UART0_OFFSET(0);
break;
case PIC_UART_1_IRQ:
return PIC_IRT_UART_1_INDEX;
case PIC_PCIE_LINK_0_IRQ:
return PIC_IRT_PCIE_LINK_0_INDEX;
case PIC_PCIE_LINK_1_IRQ:
return PIC_IRT_PCIE_LINK_1_INDEX;
case PIC_PCIE_LINK_2_IRQ:
return PIC_IRT_PCIE_LINK_2_INDEX;
case PIC_PCIE_LINK_3_IRQ:
return PIC_IRT_PCIE_LINK_3_INDEX;
devoff = XLP_IO_UART1_OFFSET(0);
break;
case PIC_EHCI_0_IRQ:
return PIC_IRT_EHCI_0_INDEX;
devoff = XLP_IO_USB_EHCI0_OFFSET(0);
break;
case PIC_EHCI_1_IRQ:
return PIC_IRT_EHCI_1_INDEX;
devoff = XLP_IO_USB_EHCI1_OFFSET(0);
break;
case PIC_OHCI_0_IRQ:
return PIC_IRT_OHCI_0_INDEX;
devoff = XLP_IO_USB_OHCI0_OFFSET(0);
break;
case PIC_OHCI_1_IRQ:
return PIC_IRT_OHCI_1_INDEX;
devoff = XLP_IO_USB_OHCI1_OFFSET(0);
break;
case PIC_OHCI_2_IRQ:
return PIC_IRT_OHCI_2_INDEX;
devoff = XLP_IO_USB_OHCI2_OFFSET(0);
break;
case PIC_OHCI_3_IRQ:
return PIC_IRT_OHCI_3_INDEX;
devoff = XLP_IO_USB_OHCI3_OFFSET(0);
break;
case PIC_MMC_IRQ:
return PIC_IRT_MMC_INDEX;
devoff = XLP_IO_SD_OFFSET(0);
break;
case PIC_I2C_0_IRQ:
return PIC_IRT_I2C_0_INDEX;
devoff = XLP_IO_I2C0_OFFSET(0);
break;
case PIC_I2C_1_IRQ:
return PIC_IRT_I2C_1_INDEX;
devoff = XLP_IO_I2C1_OFFSET(0);
break;
default:
return -1;
devoff = 0;
break;
}
if (devoff != 0) {
pcibase = nlm_pcicfg_base(devoff);
irt = nlm_read_reg(pcibase, XLP_PCI_IRTINFO_REG) & 0xffff;
/* HW bug, I2C 1 irt entry is off by one */
if (irq == PIC_I2C_1_IRQ)
irt = irt + 1;
} else if (irq >= PIC_PCIE_LINK_0_IRQ && irq <= PIC_PCIE_LINK_3_IRQ) {
/* HW bug, PCI IRT entries are bad on early silicon, fix */
irt = PIC_IRT_PCIE_LINK_INDEX(irq - PIC_PCIE_LINK_0_IRQ);
} else {
irt = -1;
}
return irt;
}
unsigned int nlm_get_core_frequency(int node, int core)