usb: dwc2: host: Get aligned DMA in a more supported way
All other host controllers who want aligned buffers for DMA do it a certain way. Let's do that too instead of working behind the USB core's back. This makes our interrupt handler not take forever and also rips out a lot of code, simplifying things a bunch. This also has the side effect of removing the 65535 max transfer size limit. NOTE: The actual code to allocate the aligned buffers is ripped almost completely from the tegra EHCI driver. At some point in the future we may want to add this functionality to the USB core to share more code everywhere. Signed-off-by: Douglas Anderson <dianders@chromium.org> Acked-by: John Youn <johnyoun@synopsys.com> Tested-by: Heiko Stuebner <heiko@sntech.de> Tested-by: John Youn <johnyoun@synopsys.com> Tested-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: Felipe Balbi <balbi@kernel.org>
此提交包含在：
Douglas Anderson
@@ -635,9 +635,9 @@ static void dwc2_hc_init_split(struct dwc2_hsotg *hsotg,
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chan->hub_port = (u8)hub_port;
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}
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static void *dwc2_hc_init_xfer(struct dwc2_hsotg *hsotg,
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struct dwc2_host_chan *chan,
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struct dwc2_qtd *qtd, void *bufptr)
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static void dwc2_hc_init_xfer(struct dwc2_hsotg *hsotg,
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struct dwc2_host_chan *chan,
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struct dwc2_qtd *qtd)
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{
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struct dwc2_hcd_urb *urb = qtd->urb;
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struct dwc2_hcd_iso_packet_desc *frame_desc;
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@@ -657,7 +657,6 @@ static void *dwc2_hc_init_xfer(struct dwc2_hsotg *hsotg,
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else
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chan->xfer_buf = urb->setup_packet;
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chan->xfer_len = 8;
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bufptr = NULL;
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break;
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case DWC2_CONTROL_DATA:
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@@ -684,7 +683,6 @@ static void *dwc2_hc_init_xfer(struct dwc2_hsotg *hsotg,
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chan->xfer_dma = hsotg->status_buf_dma;
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else
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chan->xfer_buf = hsotg->status_buf;
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bufptr = NULL;
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break;
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}
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break;
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@@ -717,14 +715,6 @@ static void *dwc2_hc_init_xfer(struct dwc2_hsotg *hsotg,
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chan->xfer_len = frame_desc->length - qtd->isoc_split_offset;
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/* For non-dword aligned buffers */
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if (hsotg->core_params->dma_enable > 0 &&
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(chan->xfer_dma & 0x3))
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bufptr = (u8 *)urb->buf + frame_desc->offset +
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qtd->isoc_split_offset;
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else
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bufptr = NULL;
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if (chan->xact_pos == DWC2_HCSPLT_XACTPOS_ALL) {
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if (chan->xfer_len <= 188)
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chan->xact_pos = DWC2_HCSPLT_XACTPOS_ALL;
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@@ -733,63 +723,93 @@ static void *dwc2_hc_init_xfer(struct dwc2_hsotg *hsotg,
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}
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break;
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}
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return bufptr;
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}
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static int dwc2_hc_setup_align_buf(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh,
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struct dwc2_host_chan *chan,
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struct dwc2_hcd_urb *urb, void *bufptr)
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#define DWC2_USB_DMA_ALIGN 4
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struct dma_aligned_buffer {
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void *kmalloc_ptr;
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void *old_xfer_buffer;
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u8 data[0];
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};
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static void dwc2_free_dma_aligned_buffer(struct urb *urb)
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{
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u32 buf_size;
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struct urb *usb_urb;
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struct usb_hcd *hcd;
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struct dma_aligned_buffer *temp;
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if (!qh->dw_align_buf) {
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if (chan->ep_type != USB_ENDPOINT_XFER_ISOC)
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buf_size = hsotg->core_params->max_transfer_size;
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else
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/* 3072 = 3 max-size Isoc packets */
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buf_size = 3072;
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if (!(urb->transfer_flags & URB_ALIGNED_TEMP_BUFFER))
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return;
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qh->dw_align_buf = kmalloc(buf_size, GFP_ATOMIC | GFP_DMA);
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if (!qh->dw_align_buf)
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return -ENOMEM;
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qh->dw_align_buf_size = buf_size;
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}
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temp = container_of(urb->transfer_buffer,
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struct dma_aligned_buffer, data);
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if (chan->xfer_len) {
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dev_vdbg(hsotg->dev, "%s(): non-aligned buffer\n", __func__);
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usb_urb = urb->priv;
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if (usb_urb_dir_in(urb))
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memcpy(temp->old_xfer_buffer, temp->data,
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urb->transfer_buffer_length);
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urb->transfer_buffer = temp->old_xfer_buffer;
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kfree(temp->kmalloc_ptr);
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if (usb_urb) {
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if (usb_urb->transfer_flags &
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(URB_SETUP_MAP_SINGLE | URB_DMA_MAP_SG |
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URB_DMA_MAP_PAGE | URB_DMA_MAP_SINGLE)) {
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hcd = dwc2_hsotg_to_hcd(hsotg);
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usb_hcd_unmap_urb_for_dma(hcd, usb_urb);
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}
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if (!chan->ep_is_in)
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memcpy(qh->dw_align_buf, bufptr,
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chan->xfer_len);
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} else {
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dev_warn(hsotg->dev, "no URB in dwc2_urb\n");
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}
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}
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urb->transfer_flags &= ~URB_ALIGNED_TEMP_BUFFER;
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}
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qh->dw_align_buf_dma = dma_map_single(hsotg->dev,
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qh->dw_align_buf, qh->dw_align_buf_size,
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chan->ep_is_in ? DMA_FROM_DEVICE : DMA_TO_DEVICE);
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if (dma_mapping_error(hsotg->dev, qh->dw_align_buf_dma)) {
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dev_err(hsotg->dev, "can't map align_buf\n");
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chan->align_buf = 0;
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return -EINVAL;
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}
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static int dwc2_alloc_dma_aligned_buffer(struct urb *urb, gfp_t mem_flags)
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{
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struct dma_aligned_buffer *temp, *kmalloc_ptr;
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size_t kmalloc_size;
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if (urb->num_sgs || urb->sg ||
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urb->transfer_buffer_length == 0 ||
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!((uintptr_t)urb->transfer_buffer & (DWC2_USB_DMA_ALIGN - 1)))
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return 0;
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/* Allocate a buffer with enough padding for alignment */
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kmalloc_size = urb->transfer_buffer_length +
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sizeof(struct dma_aligned_buffer) + DWC2_USB_DMA_ALIGN - 1;
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kmalloc_ptr = kmalloc(kmalloc_size, mem_flags);
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if (!kmalloc_ptr)
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return -ENOMEM;
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/* Position our struct dma_aligned_buffer such that data is aligned */
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temp = PTR_ALIGN(kmalloc_ptr + 1, DWC2_USB_DMA_ALIGN) - 1;
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temp->kmalloc_ptr = kmalloc_ptr;
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temp->old_xfer_buffer = urb->transfer_buffer;
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if (usb_urb_dir_out(urb))
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memcpy(temp->data, urb->transfer_buffer,
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urb->transfer_buffer_length);
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urb->transfer_buffer = temp->data;
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urb->transfer_flags |= URB_ALIGNED_TEMP_BUFFER;
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chan->align_buf = qh->dw_align_buf_dma;
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return 0;
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}
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static int dwc2_map_urb_for_dma(struct usb_hcd *hcd, struct urb *urb,
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gfp_t mem_flags)
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{
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int ret;
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/* We assume setup_dma is always aligned; warn if not */
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WARN_ON_ONCE(urb->setup_dma &&
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(urb->setup_dma & (DWC2_USB_DMA_ALIGN - 1)));
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ret = dwc2_alloc_dma_aligned_buffer(urb, mem_flags);
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if (ret)
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return ret;
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ret = usb_hcd_map_urb_for_dma(hcd, urb, mem_flags);
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if (ret)
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dwc2_free_dma_aligned_buffer(urb);
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return ret;
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}
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static void dwc2_unmap_urb_for_dma(struct usb_hcd *hcd, struct urb *urb)
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{
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usb_hcd_unmap_urb_for_dma(hcd, urb);
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dwc2_free_dma_aligned_buffer(urb);
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}
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/**
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* dwc2_assign_and_init_hc() - Assigns transactions from a QTD to a free host
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* channel and initializes the host channel to perform the transactions. The
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@@ -804,7 +824,6 @@ static int dwc2_assign_and_init_hc(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
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struct dwc2_host_chan *chan;
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struct dwc2_hcd_urb *urb;
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struct dwc2_qtd *qtd;
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void *bufptr = NULL;
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if (dbg_qh(qh))
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dev_vdbg(hsotg->dev, "%s(%p,%p)\n", __func__, hsotg, qh);
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@@ -866,16 +885,10 @@ static int dwc2_assign_and_init_hc(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
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!dwc2_hcd_is_pipe_in(&urb->pipe_info))
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urb->actual_length = urb->length;
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if (hsotg->core_params->dma_enable > 0) {
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if (hsotg->core_params->dma_enable > 0)
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chan->xfer_dma = urb->dma + urb->actual_length;
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/* For non-dword aligned case */
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if (hsotg->core_params->dma_desc_enable <= 0 &&
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(chan->xfer_dma & 0x3))
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bufptr = (u8 *)urb->buf + urb->actual_length;
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} else {
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else
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chan->xfer_buf = (u8 *)urb->buf + urb->actual_length;
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}
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chan->xfer_len = urb->length - urb->actual_length;
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chan->xfer_count = 0;
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@@ -887,27 +900,7 @@ static int dwc2_assign_and_init_hc(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
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chan->do_split = 0;
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/* Set the transfer attributes */
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bufptr = dwc2_hc_init_xfer(hsotg, chan, qtd, bufptr);
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/* Non DWORD-aligned buffer case */
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if (bufptr) {
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dev_vdbg(hsotg->dev, "Non-aligned buffer\n");
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if (dwc2_hc_setup_align_buf(hsotg, qh, chan, urb, bufptr)) {
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dev_err(hsotg->dev,
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"%s: Failed to allocate memory to handle non-dword aligned buffer\n",
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__func__);
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/* Add channel back to free list */
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chan->align_buf = 0;
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chan->multi_count = 0;
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list_add_tail(&chan->hc_list_entry,
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&hsotg->free_hc_list);
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qtd->in_process = 0;
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qh->channel = NULL;
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return -ENOMEM;
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}
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} else {
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chan->align_buf = 0;
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}
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dwc2_hc_init_xfer(hsotg, chan, qtd);
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if (chan->ep_type == USB_ENDPOINT_XFER_INT ||
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chan->ep_type == USB_ENDPOINT_XFER_ISOC)
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@@ -2971,6 +2964,9 @@ static struct hc_driver dwc2_hc_driver = {
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.bus_suspend = _dwc2_hcd_suspend,
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.bus_resume = _dwc2_hcd_resume,
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.map_urb_for_dma = dwc2_map_urb_for_dma,
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.unmap_urb_for_dma = dwc2_unmap_urb_for_dma,
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};
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/*
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