ACPI: cleanup pci_root _OSC code.
Signed-off-by: Shaohua Li <shaohua.li@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
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@@ -263,7 +263,6 @@ struct acpi_osc_context {
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#define OSC_QUERY_TYPE 0
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#define OSC_SUPPORT_TYPE 1
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#define OSC_CONTROL_TYPE 2
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#define OSC_SUPPORT_MASKS 0x1f
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/* _OSC DW0 Definition */
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#define OSC_QUERY_ENABLE 1
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@@ -274,12 +273,14 @@ struct acpi_osc_context {
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acpi_status acpi_run_osc(acpi_handle handle, struct acpi_osc_context *context);
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/* PCI defined _OSC bits */
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/* _OSC DW1 Definition (OS Support Fields) */
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#define OSC_EXT_PCI_CONFIG_SUPPORT 1
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#define OSC_ACTIVE_STATE_PWR_SUPPORT 2
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#define OSC_CLOCK_PWR_CAPABILITY_SUPPORT 4
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#define OSC_PCI_SEGMENT_GROUPS_SUPPORT 8
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#define OSC_MSI_SUPPORT 16
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#define OSC_PCI_SUPPORT_MASKS 0x1f
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/* _OSC DW1 Definition (OS Control Fields) */
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#define OSC_PCI_EXPRESS_NATIVE_HP_CONTROL 1
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@@ -288,7 +289,7 @@ acpi_status acpi_run_osc(acpi_handle handle, struct acpi_osc_context *context);
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#define OSC_PCI_EXPRESS_AER_CONTROL 8
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#define OSC_PCI_EXPRESS_CAP_STRUCTURE_CONTROL 16
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#define OSC_CONTROL_MASKS (OSC_PCI_EXPRESS_NATIVE_HP_CONTROL | \
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#define OSC_PCI_CONTROL_MASKS (OSC_PCI_EXPRESS_NATIVE_HP_CONTROL | \
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OSC_SHPC_NATIVE_HP_CONTROL | \
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OSC_PCI_EXPRESS_PME_CONTROL | \
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OSC_PCI_EXPRESS_AER_CONTROL | \
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