powerpc/ppc-opcode: Consolidate powerpc instructions from bpf_jit.h
Move macro definitions of powerpc instructions from bpf_jit.h to ppc-opcode.h and adopt the users of the macros accordingly. `PPC_MR()` is defined twice in bpf_jit.h, remove the duplicate one. Signed-off-by: Balamuruhan S <bala24@linux.ibm.com> Tested-by: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com> Acked-by: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com> Acked-by: Sandipan Das <sandipan@linux.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20200624113038.908074-5-bala24@linux.ibm.com
This commit is contained in:

committed by
Michael Ellerman

parent
0654186510
commit
3a18123791
@@ -19,150 +19,10 @@
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#define FUNCTION_DESCR_SIZE 0
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#endif
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/*
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* 16-bit immediate helper macros: HA() is for use with sign-extending instrs
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* (e.g. LD, ADDI). If the bottom 16 bits is "-ve", add another bit into the
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* top half to negate the effect (i.e. 0xffff + 1 = 0x(1)0000).
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*/
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#define IMM_H(i) ((uintptr_t)(i)>>16)
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#define IMM_HA(i) (((uintptr_t)(i)>>16) + \
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(((uintptr_t)(i) & 0x8000) >> 15))
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#define PLANT_INSTR(d, idx, instr) \
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do { if (d) { (d)[idx] = instr; } idx++; } while (0)
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#define EMIT(instr) PLANT_INSTR(image, ctx->idx, instr)
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#define PPC_NOP() EMIT(PPC_INST_NOP)
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#define PPC_BLR() EMIT(PPC_INST_BLR)
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#define PPC_BLRL() EMIT(PPC_INST_BLRL)
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#define PPC_MTLR(r) EMIT(PPC_INST_MTLR | ___PPC_RT(r))
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#define PPC_BCTR() EMIT(PPC_INST_BCTR)
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#define PPC_MTCTR(r) EMIT(PPC_INST_MTCTR | ___PPC_RT(r))
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#define PPC_ADDI(d, a, i) EMIT(PPC_INST_ADDI | ___PPC_RT(d) | \
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___PPC_RA(a) | IMM_L(i))
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#define PPC_MR(d, a) PPC_OR(d, a, a)
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#define PPC_LI(r, i) PPC_ADDI(r, 0, i)
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#define PPC_ADDIS(d, a, i) EMIT(PPC_INST_ADDIS | \
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___PPC_RT(d) | ___PPC_RA(a) | IMM_L(i))
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#define PPC_LIS(r, i) PPC_ADDIS(r, 0, i)
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#define PPC_STDX(r, base, b) EMIT(PPC_INST_STDX | ___PPC_RS(r) | \
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___PPC_RA(base) | ___PPC_RB(b))
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#define PPC_STDU(r, base, i) EMIT(PPC_INST_STDU | ___PPC_RS(r) | \
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___PPC_RA(base) | ((i) & 0xfffc))
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#define PPC_STW(r, base, i) EMIT(PPC_INST_STW | ___PPC_RS(r) | \
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___PPC_RA(base) | IMM_L(i))
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#define PPC_STWU(r, base, i) EMIT(PPC_INST_STWU | ___PPC_RS(r) | \
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___PPC_RA(base) | IMM_L(i))
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#define PPC_STH(r, base, i) EMIT(PPC_INST_STH | ___PPC_RS(r) | \
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___PPC_RA(base) | IMM_L(i))
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#define PPC_STB(r, base, i) EMIT(PPC_INST_STB | ___PPC_RS(r) | \
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___PPC_RA(base) | IMM_L(i))
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#define PPC_LBZ(r, base, i) EMIT(PPC_INST_LBZ | ___PPC_RT(r) | \
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___PPC_RA(base) | IMM_L(i))
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#define PPC_LDX(r, base, b) EMIT(PPC_INST_LDX | ___PPC_RT(r) | \
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___PPC_RA(base) | ___PPC_RB(b))
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#define PPC_LHZ(r, base, i) EMIT(PPC_INST_LHZ | ___PPC_RT(r) | \
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___PPC_RA(base) | IMM_L(i))
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#define PPC_LHBRX(r, base, b) EMIT(PPC_INST_LHBRX | ___PPC_RT(r) | \
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___PPC_RA(base) | ___PPC_RB(b))
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#define PPC_LDBRX(r, base, b) EMIT(PPC_INST_LDBRX | ___PPC_RT(r) | \
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___PPC_RA(base) | ___PPC_RB(b))
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#define PPC_BPF_STWCX(s, a, b) EMIT(PPC_INST_STWCX | ___PPC_RS(s) | \
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___PPC_RA(a) | ___PPC_RB(b))
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#define PPC_CMPWI(a, i) EMIT(PPC_INST_CMPWI | ___PPC_RA(a) | IMM_L(i))
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#define PPC_CMPDI(a, i) EMIT(PPC_INST_CMPDI | ___PPC_RA(a) | IMM_L(i))
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#define PPC_CMPW(a, b) EMIT(PPC_INST_CMPW | ___PPC_RA(a) | \
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___PPC_RB(b))
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#define PPC_CMPD(a, b) EMIT(PPC_INST_CMPD | ___PPC_RA(a) | \
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___PPC_RB(b))
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#define PPC_CMPLWI(a, i) EMIT(PPC_INST_CMPLWI | ___PPC_RA(a) | IMM_L(i))
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#define PPC_CMPLDI(a, i) EMIT(PPC_INST_CMPLDI | ___PPC_RA(a) | IMM_L(i))
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#define PPC_CMPLW(a, b) EMIT(PPC_INST_CMPLW | ___PPC_RA(a) | \
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___PPC_RB(b))
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#define PPC_CMPLD(a, b) EMIT(PPC_INST_CMPLD | ___PPC_RA(a) | \
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___PPC_RB(b))
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#define PPC_SUB(d, a, b) EMIT(PPC_INST_SUB | ___PPC_RT(d) | \
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___PPC_RB(a) | ___PPC_RA(b))
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#define PPC_MULD(d, a, b) EMIT(PPC_INST_MULLD | ___PPC_RT(d) | \
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___PPC_RA(a) | ___PPC_RB(b))
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#define PPC_MULW(d, a, b) EMIT(PPC_INST_MULLW | ___PPC_RT(d) | \
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___PPC_RA(a) | ___PPC_RB(b))
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#define PPC_MULHWU(d, a, b) EMIT(PPC_INST_MULHWU | ___PPC_RT(d) | \
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___PPC_RA(a) | ___PPC_RB(b))
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#define PPC_MULI(d, a, i) EMIT(PPC_INST_MULLI | ___PPC_RT(d) | \
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___PPC_RA(a) | IMM_L(i))
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#define PPC_DIVWU(d, a, b) EMIT(PPC_INST_DIVWU | ___PPC_RT(d) | \
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___PPC_RA(a) | ___PPC_RB(b))
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#define PPC_DIVDU(d, a, b) EMIT(PPC_INST_DIVDU | ___PPC_RT(d) | \
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___PPC_RA(a) | ___PPC_RB(b))
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#define PPC_AND(d, a, b) EMIT(PPC_INST_AND | ___PPC_RA(d) | \
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___PPC_RS(a) | ___PPC_RB(b))
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#define PPC_ANDI(d, a, i) EMIT(PPC_INST_ANDI | ___PPC_RA(d) | \
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___PPC_RS(a) | IMM_L(i))
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#define PPC_AND_DOT(d, a, b) EMIT(PPC_INST_ANDDOT | ___PPC_RA(d) | \
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___PPC_RS(a) | ___PPC_RB(b))
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#define PPC_OR(d, a, b) EMIT(PPC_INST_OR | ___PPC_RA(d) | \
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___PPC_RS(a) | ___PPC_RB(b))
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#define PPC_MR(d, a) PPC_OR(d, a, a)
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#define PPC_ORI(d, a, i) EMIT(PPC_INST_ORI | ___PPC_RA(d) | \
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___PPC_RS(a) | IMM_L(i))
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#define PPC_ORIS(d, a, i) EMIT(PPC_INST_ORIS | ___PPC_RA(d) | \
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___PPC_RS(a) | IMM_L(i))
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#define PPC_XOR(d, a, b) EMIT(PPC_INST_XOR | ___PPC_RA(d) | \
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___PPC_RS(a) | ___PPC_RB(b))
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#define PPC_XORI(d, a, i) EMIT(PPC_INST_XORI | ___PPC_RA(d) | \
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___PPC_RS(a) | IMM_L(i))
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#define PPC_XORIS(d, a, i) EMIT(PPC_INST_XORIS | ___PPC_RA(d) | \
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___PPC_RS(a) | IMM_L(i))
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#define PPC_EXTSW(d, a) EMIT(PPC_INST_EXTSW | ___PPC_RA(d) | \
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___PPC_RS(a))
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#define PPC_SLW(d, a, s) EMIT(PPC_INST_SLW | ___PPC_RA(d) | \
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___PPC_RS(a) | ___PPC_RB(s))
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#define PPC_SLD(d, a, s) EMIT(PPC_INST_SLD | ___PPC_RA(d) | \
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___PPC_RS(a) | ___PPC_RB(s))
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#define PPC_SRW(d, a, s) EMIT(PPC_INST_SRW | ___PPC_RA(d) | \
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___PPC_RS(a) | ___PPC_RB(s))
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#define PPC_SRAW(d, a, s) EMIT(PPC_INST_SRAW | ___PPC_RA(d) | \
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___PPC_RS(a) | ___PPC_RB(s))
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#define PPC_SRAWI(d, a, i) EMIT(PPC_INST_SRAWI | ___PPC_RA(d) | \
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___PPC_RS(a) | __PPC_SH(i))
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#define PPC_SRD(d, a, s) EMIT(PPC_INST_SRD | ___PPC_RA(d) | \
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___PPC_RS(a) | ___PPC_RB(s))
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#define PPC_SRAD(d, a, s) EMIT(PPC_INST_SRAD | ___PPC_RA(d) | \
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___PPC_RS(a) | ___PPC_RB(s))
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#define PPC_SRADI(d, a, i) EMIT(PPC_INST_SRADI | ___PPC_RA(d) | \
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___PPC_RS(a) | __PPC_SH64(i))
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#define PPC_RLWINM(d, a, i, mb, me) EMIT(PPC_INST_RLWINM | ___PPC_RA(d) | \
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___PPC_RS(a) | __PPC_SH(i) | \
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__PPC_MB(mb) | __PPC_ME(me))
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#define PPC_RLWINM_DOT(d, a, i, mb, me) EMIT(PPC_INST_RLWINM_DOT | \
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___PPC_RA(d) | ___PPC_RS(a) | \
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__PPC_SH(i) | __PPC_MB(mb) | \
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__PPC_ME(me))
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#define PPC_RLWIMI(d, a, i, mb, me) EMIT(PPC_INST_RLWIMI | ___PPC_RA(d) | \
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___PPC_RS(a) | __PPC_SH(i) | \
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__PPC_MB(mb) | __PPC_ME(me))
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#define PPC_RLDICL(d, a, i, mb) EMIT(PPC_INST_RLDICL | ___PPC_RA(d) | \
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___PPC_RS(a) | __PPC_SH64(i) | \
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__PPC_MB64(mb))
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#define PPC_RLDICR(d, a, i, me) EMIT(PPC_INST_RLDICR | ___PPC_RA(d) | \
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___PPC_RS(a) | __PPC_SH64(i) | \
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__PPC_ME64(me))
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/* slwi = rlwinm Rx, Ry, n, 0, 31-n */
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#define PPC_SLWI(d, a, i) PPC_RLWINM(d, a, i, 0, 31-(i))
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/* srwi = rlwinm Rx, Ry, 32-n, n, 31 */
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#define PPC_SRWI(d, a, i) PPC_RLWINM(d, a, 32-(i), i, 31)
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/* sldi = rldicr Rx, Ry, n, 63-n */
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#define PPC_SLDI(d, a, i) PPC_RLDICR(d, a, i, 63-(i))
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/* sldi = rldicl Rx, Ry, 64-n, n */
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#define PPC_SRDI(d, a, i) PPC_RLDICL(d, a, 64-(i), i)
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#define PPC_NEG(d, a) EMIT(PPC_INST_NEG | ___PPC_RT(d) | ___PPC_RA(a))
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/* Long jump; (unconditional 'branch') */
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#define PPC_JMP(dest) EMIT(PPC_INST_BRANCH | \
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(((dest) - (ctx->idx * 4)) & 0x03fffffc))
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@@ -175,11 +35,11 @@
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#define PPC_LI32(d, i) do { \
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if ((int)(uintptr_t)(i) >= -32768 && \
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(int)(uintptr_t)(i) < 32768) \
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PPC_LI(d, i); \
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EMIT(PPC_RAW_LI(d, i)); \
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else { \
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PPC_LIS(d, IMM_H(i)); \
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EMIT(PPC_RAW_LIS(d, IMM_H(i))); \
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if (IMM_L(i)) \
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PPC_ORI(d, d, IMM_L(i)); \
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EMIT(PPC_RAW_ORI(d, d, IMM_L(i))); \
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} } while(0)
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#define PPC_LI64(d, i) do { \
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@@ -188,19 +48,21 @@
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PPC_LI32(d, i); \
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else { \
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if (!((uintptr_t)(i) & 0xffff800000000000ULL)) \
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PPC_LI(d, ((uintptr_t)(i) >> 32) & 0xffff); \
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EMIT(PPC_RAW_LI(d, ((uintptr_t)(i) >> 32) & \
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0xffff)); \
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else { \
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PPC_LIS(d, ((uintptr_t)(i) >> 48)); \
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EMIT(PPC_RAW_LIS(d, ((uintptr_t)(i) >> 48))); \
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if ((uintptr_t)(i) & 0x0000ffff00000000ULL) \
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PPC_ORI(d, d, \
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((uintptr_t)(i) >> 32) & 0xffff); \
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EMIT(PPC_RAW_ORI(d, d, \
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((uintptr_t)(i) >> 32) & 0xffff)); \
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} \
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PPC_SLDI(d, d, 32); \
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EMIT(PPC_RAW_SLDI(d, d, 32)); \
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if ((uintptr_t)(i) & 0x00000000ffff0000ULL) \
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PPC_ORIS(d, d, \
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((uintptr_t)(i) >> 16) & 0xffff); \
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EMIT(PPC_RAW_ORIS(d, d, \
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((uintptr_t)(i) >> 16) & 0xffff)); \
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if ((uintptr_t)(i) & 0x000000000000ffffULL) \
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PPC_ORI(d, d, (uintptr_t)(i) & 0xffff); \
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EMIT(PPC_RAW_ORI(d, d, (uintptr_t)(i) & \
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0xffff)); \
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} } while (0)
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#ifdef CONFIG_PPC64
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@@ -224,7 +86,7 @@ static inline bool is_nearbranch(int offset)
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#define PPC_BCC(cond, dest) do { \
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if (is_nearbranch((dest) - (ctx->idx * 4))) { \
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PPC_BCC_SHORT(cond, dest); \
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PPC_NOP(); \
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EMIT(PPC_RAW_NOP()); \
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} else { \
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/* Flip the 'T or F' bit to invert comparison */ \
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PPC_BCC_SHORT(cond ^ COND_CMP_TRUE, (ctx->idx+2)*4); \
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