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pinctrl: uniphier: support pin configuration for dedicated pins

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PH1-LD4 and PH1-sLD8 SoCs have pins that support pin configuration
(pin biasing, drive strength control), but not pin-muxing.

Allow to fill the mux value table with -1 for those pins; pins with
mux value -1 will be skipped in the pin-mux set function.  The mux
value type should be changed from "unsigned" to "int" in order to
accommodate -1 as a special case.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Masahiro Yamada
2016-05-31 17:05:18 +09:00
committed by Linus Walleij
parent aa543888ca
commit 39ec9ace7a
8 changed files with 144 additions and 147 deletions
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2
drivers/pinctrl/uniphier/pinctrl-uniphier.h
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@@ -148,7 +148,7 @@ struct uniphier_pinctrl_group {
const char *name;
const unsigned *pins;
unsigned num_pins;
const unsigned *muxvals;
const int *muxvals;
enum uniphier_pinmux_gpio_range_type range_type;
};