Merge branch 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: x86, irq: Allow 0xff for /proc/irq/[n]/smp_affinity on an 8-cpu system Makefile: Unexport LC_ALL instead of clearing it x86: Fix objdump version check in arch/x86/tools/chkobjdump.awk x86: Reenable TSC sync check at boot, even with NONSTOP_TSC x86: Don't use POSIX character classes in gen-insn-attr-x86.awk Makefile: set LC_CTYPE, LC_COLLATE, LC_NUMERIC to C x86: Increase MAX_EARLY_RES; insufficient on 32-bit NUMA x86: Fix checking of SRAT when node 0 ram is not from 0 x86, cpuid: Add "volatile" to asm in native_cpuid() x86, msr: msrs_alloc/free for CONFIG_SMP=n x86, amd: Get multi-node CPU info from NodeId MSR instead of PCI config space x86: Add IA32_TSC_AUX MSR and use it x86, msr/cpuid: Register enough minors for the MSR and CPUID drivers initramfs: add missing decompressor error check bzip2: Add missing checks for malloc returning NULL bzip2/lzma/gzip: pre-boot malloc doesn't return NULL on failure
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@@ -254,59 +254,36 @@ static int __cpuinit nearby_node(int apicid)
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/*
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* Fixup core topology information for AMD multi-node processors.
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* Assumption 1: Number of cores in each internal node is the same.
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* Assumption 2: Mixed systems with both single-node and dual-node
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* processors are not supported.
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* Assumption: Number of cores in each internal node is the same.
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*/
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#ifdef CONFIG_X86_HT
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static void __cpuinit amd_fixup_dcm(struct cpuinfo_x86 *c)
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{
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#ifdef CONFIG_PCI
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u32 t, cpn;
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u8 n, n_id;
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unsigned long long value;
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u32 nodes, cores_per_node;
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int cpu = smp_processor_id();
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if (!cpu_has(c, X86_FEATURE_NODEID_MSR))
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return;
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/* fixup topology information only once for a core */
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if (cpu_has(c, X86_FEATURE_AMD_DCM))
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return;
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/* check for multi-node processor on boot cpu */
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t = read_pci_config(0, 24, 3, 0xe8);
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if (!(t & (1 << 29)))
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rdmsrl(MSR_FAM10H_NODE_ID, value);
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nodes = ((value >> 3) & 7) + 1;
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if (nodes == 1)
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return;
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set_cpu_cap(c, X86_FEATURE_AMD_DCM);
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cores_per_node = c->x86_max_cores / nodes;
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/* cores per node: each internal node has half the number of cores */
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cpn = c->x86_max_cores >> 1;
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/* store NodeID, use llc_shared_map to store sibling info */
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per_cpu(cpu_llc_id, cpu) = value & 7;
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/* even-numbered NB_id of this dual-node processor */
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n = c->phys_proc_id << 1;
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/*
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* determine internal node id and assign cores fifty-fifty to
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* each node of the dual-node processor
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*/
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t = read_pci_config(0, 24 + n, 3, 0xe8);
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n = (t>>30) & 0x3;
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if (n == 0) {
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if (c->cpu_core_id < cpn)
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n_id = 0;
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else
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n_id = 1;
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} else {
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if (c->cpu_core_id < cpn)
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n_id = 1;
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else
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n_id = 0;
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}
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/* compute entire NodeID, use llc_shared_map to store sibling info */
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per_cpu(cpu_llc_id, cpu) = (c->phys_proc_id << 1) + n_id;
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/* fixup core id to be in range from 0 to cpn */
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c->cpu_core_id = c->cpu_core_id % cpn;
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#endif
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/* fixup core id to be in range from 0 to (cores_per_node - 1) */
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c->cpu_core_id = c->cpu_core_id % cores_per_node;
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}
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#endif
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@@ -70,7 +70,6 @@ static void __cpuinit early_init_intel(struct cpuinfo_x86 *c)
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if (c->x86_power & (1 << 8)) {
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set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);
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set_cpu_cap(c, X86_FEATURE_NONSTOP_TSC);
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set_cpu_cap(c, X86_FEATURE_TSC_RELIABLE);
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sched_clock_stable = 1;
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}
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