ixgbe: Fix copper PHY initialization code
While cleaning up the internal API focussing on Fiber and CX4 code we found that I had broken the copper PHY initialization code. This patch restores the PHY-specific code. This is mostly uninteresting since no copper PHY boards are yet available. The changes have been tested against Fiber only as I do not even have copper PHY versions of 82598 macs. This change actually cleans up the API code a bit more and we lose some initialization code. A few PHY link detection helper lines of code have been snuck into this patch, as well as a read flush where it was suspected that this might cause issues. Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
This commit is contained in:

committed by
David S. Miller

parent
040babf9d8
commit
3957d63da0
@@ -74,7 +74,7 @@ s32 ixgbe_start_hw(struct ixgbe_hw *hw)
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ixgbe_clear_vfta(hw);
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/* Set up link */
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hw->phy.ops.setup(hw);
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hw->mac.ops.setup_link(hw);
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/* Clear statistics registers */
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ixgbe_clear_hw_cntrs(hw);
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@@ -83,6 +83,7 @@ s32 ixgbe_start_hw(struct ixgbe_hw *hw)
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ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
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ctrl_ext |= IXGBE_CTRL_EXT_NS_DIS;
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IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
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IXGBE_WRITE_FLUSH(hw);
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/* Clear adapter stopped flag */
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hw->adapter_stopped = false;
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@@ -297,6 +298,7 @@ s32 ixgbe_led_on(struct ixgbe_hw *hw, u32 index)
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led_reg &= ~IXGBE_LED_MODE_MASK(index);
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led_reg |= IXGBE_LED_ON << IXGBE_LED_MODE_SHIFT(index);
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IXGBE_WRITE_REG(hw, IXGBE_LEDCTL, led_reg);
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IXGBE_WRITE_FLUSH(hw);
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return 0;
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}
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@@ -314,6 +316,7 @@ s32 ixgbe_led_off(struct ixgbe_hw *hw, u32 index)
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led_reg &= ~IXGBE_LED_MODE_MASK(index);
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led_reg |= IXGBE_LED_OFF << IXGBE_LED_MODE_SHIFT(index);
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IXGBE_WRITE_REG(hw, IXGBE_LEDCTL, led_reg);
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IXGBE_WRITE_FLUSH(hw);
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return 0;
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}
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@@ -496,6 +499,7 @@ static void ixgbe_release_eeprom_semaphore(struct ixgbe_hw *hw)
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/* Release both semaphores by writing 0 to the bits SWESMBI and SMBI */
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swsm &= ~(IXGBE_SWSM_SWESMBI | IXGBE_SWSM_SMBI);
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IXGBE_WRITE_REG(hw, IXGBE_SWSM, swsm);
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IXGBE_WRITE_FLUSH(hw);
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}
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/**
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@@ -1132,7 +1136,7 @@ void ixgbe_release_swfw_sync(struct ixgbe_hw *hw, u16 mask)
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}
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/**
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* ixgbe_read_analog_reg8- Reads 8 bit 82598 Atlas analog register
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* ixgbe_read_analog_reg8 - Reads 8 bit Atlas analog register
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* @hw: pointer to hardware structure
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* @reg: analog register to read
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* @val: read value
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@@ -1154,7 +1158,7 @@ s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val)
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}
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/**
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* ixgbe_write_analog_reg8- Writes 8 bit Atlas analog register
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* ixgbe_write_analog_reg8 - Writes 8 bit Atlas analog register
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* @hw: pointer to hardware structure
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* @reg: atlas register to write
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* @val: value to write
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