IB/mthca: Fix access to MTT and MPT tables on non-cache-coherent CPUs
We allocate the MTT table with alloc_pages() and then do pci_map_sg(), so we must call pci_dma_sync_sg() after the CPU writes to the MTT table. This works since the device will never write MTTs on mem-free HCAs, once we get rid of the use of the WRITE_MTT firmware command. This change is needed to make that work, and is an improvement for now, since it gives FMRs a chance at working. For MPTs, both the device and CPU might write there, so we must allocate DMA coherent memory for these. Signed-off-by: Michael S. Tsirkin <mst@mellanox.co.il> Signed-off-by: Roland Dreier <rolandd@cisco.com>
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committed by
Roland Dreier

parent
1d1f19cfce
commit
391e4dea71
@@ -89,6 +89,7 @@ struct mthca_fmr {
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struct {
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struct mthca_mpt_entry *mpt;
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__be64 *mtts;
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dma_addr_t dma_handle;
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} arbel;
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} mem;
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};
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