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MIPS: lantiq: Use CP0_LEGACY_COMPARE_IRQ

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Instead of using the lantiq specific MIPS_CPU_TIMER_IRQ use the generic
CP0_LEGACY_COMPARE_IRQ constant for the timer interrupt number.
MIPS_CPU_TIMER_IRQ was already defined to 7 for both supported SoC
families.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: jhogan@kernel.org
Cc: ralf@linux-mips.org
Cc: john@phrozen.org
Cc: linux-mips@linux-mips.org
Cc: linux-mips@vger.kernel.org
This commit is contained in:
Hauke Mehrtens
2019-01-06 19:44:12 +01:00
committed by Paul Burton
parent 2b4dba55b0
commit 390d1b461e
3 changed files with 1 additions and 12 deletions
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2
arch/mips/include/asm/mach-lantiq/falcon/falcon_irq.h
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@@ -18,8 +18,6 @@
#define INT_NUM_EXTRA_START (INT_NUM_IM4_IRL0 + 32)
#define INT_NUM_IM_OFFSET (INT_NUM_IM1_IRL0 - INT_NUM_IM0_IRL0)
#define MIPS_CPU_TIMER_IRQ 7
#define MAX_IM 5
#endif /* _FALCON_IRQ__ */

2
arch/mips/include/asm/mach-lantiq/xway/lantiq_irq.h
View File

@@ -19,8 +19,6 @@
#define LTQ_DMA_CH0_INT (INT_NUM_IM2_IRL0)
#define MIPS_CPU_TIMER_IRQ 7
#define MAX_IM 5
#endif