xiaomi-sm8450/android_kernel_xiaomi_sm8450
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

perf_counter: fix update_userpage()

Browse Source 
It just occured to me it is possible to have multiple contending
updates of the userpage (mmap information vs overflow vs counter).
This would break the seqlock logic.

It appear the arch code uses this from NMI context, so we cannot
possibly serialize its use, therefore separate the data_head update
from it and let it return to its original use.

The arch code needs to make sure there are no contending callers by
disabling the counter before using it -- powerpc appears to do this
nicely.

Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Acked-by: Paul Mackerras <paulus@samba.org>
Orig-LKML-Reference: <20090330171023.241410660@chello.nl>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
This commit is contained in:
Peter Zijlstra
2009-03-30 19:07:03 +02:00
committed by Ingo Molnar
parent 925d519ab8
commit 38ff667b32
2 changed files with 58 additions and 15 deletions
Download Patch File Download Diff File Expand all files Collapse all files

35
include/linux/perf_counter.h
View File

@@ -160,10 +160,45 @@ struct perf_counter_hw_event {
struct perf_counter_mmap_page {
__u32 version; /* version number of this structure */
__u32 compat_version; /* lowest version this is compat with */
/*
* Bits needed to read the hw counters in user-space.
*
* The index and offset should be read atomically using the seqlock:
*
* __u32 seq, index;
* __s64 offset;
*
* again:
* rmb();
* seq = pc->lock;
*
* if (unlikely(seq & 1)) {
* cpu_relax();
* goto again;
* }
*
* index = pc->index;
* offset = pc->offset;
*
* rmb();
* if (pc->lock != seq)
* goto again;
*
* After this, index contains architecture specific counter index + 1,
* so that 0 means unavailable, offset contains the value to be added
* to the result of the raw timer read to obtain this counter's value.
*/
__u32 lock; /* seqlock for synchronization */
__u32 index; /* hardware counter identifier */
__s64 offset; /* add to hardware counter value */
/*
* Control data for the mmap() data buffer.
*
* User-space reading this value should issue an rmb(), on SMP capable
* platforms, after reading this value -- see perf_counter_wakeup().
*/
__u32 data_head; /* head in the data section */
};