m68k: Fix invalid RMW_INSNS on CPUs that lack CAS
[ Upstream commit 2189e928b62e91d8efbc9826ae7c0968f0d55790 ]
When enabling CONFIG_RMW_INSNS in e.g. a Coldfire build:
{standard input}:3068: Error: invalid instruction for this architecture; needs 68020 or higher (68020 [68k, 68ec020], 68030 [68ec030], 68040 [68ec040], 68060 [68ec060]) -- statement `casl %d4,%d0,(%a6)' ignored
Fix this by (a) adding a new config symbol to track if support for any
CPU that lacks the CAS instruction is enabled, and (b) making
CONFIG_RMW_INSNS depend on the new symbol not being set.
Fixes: 0e152d8050 ("m68k: reorganize Kconfig options to improve mmu/non-mmu selections")
Reported-by: kernel test robot <lkp@intel.com>
Reported-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/r/20210725104413.318932-1-geert@linux-m68k.org
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
committed by
Greg Kroah-Hartman
parent
497f3d9c3f
commit
3868507181
@@ -25,6 +25,7 @@ config COLDFIRE
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bool "Coldfire CPU family support"
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select ARCH_HAVE_CUSTOM_GPIO_H
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select CPU_HAS_NO_BITFIELDS
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select CPU_HAS_NO_CAS
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select CPU_HAS_NO_MULDIV64
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select GENERIC_CSUM
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select GPIOLIB
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@@ -38,6 +39,7 @@ config M68000
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bool "MC68000"
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depends on !MMU
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select CPU_HAS_NO_BITFIELDS
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select CPU_HAS_NO_CAS
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select CPU_HAS_NO_MULDIV64
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select CPU_HAS_NO_UNALIGNED
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select GENERIC_CSUM
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@@ -53,6 +55,7 @@ config M68000
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config MCPU32
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bool
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select CPU_HAS_NO_BITFIELDS
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select CPU_HAS_NO_CAS
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select CPU_HAS_NO_UNALIGNED
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select CPU_NO_EFFICIENT_FFS
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help
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@@ -357,7 +360,7 @@ config ADVANCED
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config RMW_INSNS
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bool "Use read-modify-write instructions"
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depends on ADVANCED
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depends on ADVANCED && !CPU_HAS_NO_CAS
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help
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This allows to use certain instructions that work with indivisible
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read-modify-write bus cycles. While this is faster than the
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@@ -411,6 +414,9 @@ config NODES_SHIFT
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config CPU_HAS_NO_BITFIELDS
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bool
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config CPU_HAS_NO_CAS
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bool
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config CPU_HAS_NO_MULDIV64
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bool
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