iommu/io-pgtable: Rationalise quirk handling
As the number of io-pgtable implementations grows beyond 1, it's time to rationalise the quirks mechanism before things have a chance to start getting really ugly and out-of-hand. To that end: - Indicate exactly which quirks each format can/does support. - Fail creating a table if a caller wants unsupported quirks. - Properly document where each quirk applies and why. Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
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committed by
Will Deacon

parent
88492a4700
commit
3850db49da
@@ -623,6 +623,11 @@ static struct io_pgtable *arm_v7s_alloc_pgtable(struct io_pgtable_cfg *cfg,
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if (cfg->ias > ARM_V7S_ADDR_BITS || cfg->oas > ARM_V7S_ADDR_BITS)
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if (cfg->ias > ARM_V7S_ADDR_BITS || cfg->oas > ARM_V7S_ADDR_BITS)
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return NULL;
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return NULL;
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if (cfg->quirks & ~(IO_PGTABLE_QUIRK_ARM_NS |
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IO_PGTABLE_QUIRK_NO_PERMS |
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IO_PGTABLE_QUIRK_TLBI_ON_MAP))
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return NULL;
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data = kmalloc(sizeof(*data), GFP_KERNEL);
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data = kmalloc(sizeof(*data), GFP_KERNEL);
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if (!data)
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if (!data)
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return NULL;
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return NULL;
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@@ -659,8 +659,12 @@ static struct io_pgtable *
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arm_64_lpae_alloc_pgtable_s1(struct io_pgtable_cfg *cfg, void *cookie)
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arm_64_lpae_alloc_pgtable_s1(struct io_pgtable_cfg *cfg, void *cookie)
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{
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{
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u64 reg;
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u64 reg;
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struct arm_lpae_io_pgtable *data = arm_lpae_alloc_pgtable(cfg);
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struct arm_lpae_io_pgtable *data;
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if (cfg->quirks & ~IO_PGTABLE_QUIRK_ARM_NS)
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return NULL;
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data = arm_lpae_alloc_pgtable(cfg);
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if (!data)
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if (!data)
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return NULL;
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return NULL;
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@@ -743,8 +747,13 @@ static struct io_pgtable *
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arm_64_lpae_alloc_pgtable_s2(struct io_pgtable_cfg *cfg, void *cookie)
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arm_64_lpae_alloc_pgtable_s2(struct io_pgtable_cfg *cfg, void *cookie)
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{
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{
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u64 reg, sl;
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u64 reg, sl;
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struct arm_lpae_io_pgtable *data = arm_lpae_alloc_pgtable(cfg);
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struct arm_lpae_io_pgtable *data;
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/* The NS quirk doesn't apply at stage 2 */
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if (cfg->quirks)
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return NULL;
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data = arm_lpae_alloc_pgtable(cfg);
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if (!data)
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if (!data)
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return NULL;
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return NULL;
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@@ -47,10 +47,24 @@ struct iommu_gather_ops {
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* page table walker.
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* page table walker.
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*/
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*/
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struct io_pgtable_cfg {
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struct io_pgtable_cfg {
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#define IO_PGTABLE_QUIRK_ARM_NS BIT(0) /* Set NS bit in PTEs */
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/*
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#define IO_PGTABLE_QUIRK_NO_PERMS BIT(1) /* No AP/XN bits */
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* IO_PGTABLE_QUIRK_ARM_NS: (ARM formats) Set NS and NSTABLE bits in
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#define IO_PGTABLE_QUIRK_TLBI_ON_MAP BIT(2) /* TLB Inv. on map */
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* stage 1 PTEs, for hardware which insists on validating them
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int quirks;
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* even in non-secure state where they should normally be ignored.
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*
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* IO_PGTABLE_QUIRK_NO_PERMS: Ignore the IOMMU_READ, IOMMU_WRITE and
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* IOMMU_NOEXEC flags and map everything with full access, for
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* hardware which does not implement the permissions of a given
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* format, and/or requires some format-specific default value.
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*
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* IO_PGTABLE_QUIRK_TLBI_ON_MAP: If the format forbids caching invalid
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* (unmapped) entries but the hardware might do so anyway, perform
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* TLB maintenance when mapping as well as when unmapping.
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*/
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#define IO_PGTABLE_QUIRK_ARM_NS BIT(0)
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#define IO_PGTABLE_QUIRK_NO_PERMS BIT(1)
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#define IO_PGTABLE_QUIRK_TLBI_ON_MAP BIT(2)
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unsigned long quirks;
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unsigned long pgsize_bitmap;
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unsigned long pgsize_bitmap;
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unsigned int ias;
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unsigned int ias;
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unsigned int oas;
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unsigned int oas;
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