MIPS: Move headfiles to new location below arch/mips/include
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
38
arch/mips/include/asm/mach-tx39xx/ioremap.h
Normal file
38
arch/mips/include/asm/mach-tx39xx/ioremap.h
Normal file
@@ -0,0 +1,38 @@
|
||||
/*
|
||||
* include/asm-mips/mach-tx39xx/ioremap.h
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version
|
||||
* 2 of the License, or (at your option) any later version.
|
||||
*/
|
||||
#ifndef __ASM_MACH_TX39XX_IOREMAP_H
|
||||
#define __ASM_MACH_TX39XX_IOREMAP_H
|
||||
|
||||
#include <linux/types.h>
|
||||
|
||||
/*
|
||||
* Allow physical addresses to be fixed up to help peripherals located
|
||||
* outside the low 32-bit range -- generic pass-through version.
|
||||
*/
|
||||
static inline phys_t fixup_bigphys_addr(phys_t phys_addr, phys_t size)
|
||||
{
|
||||
return phys_addr;
|
||||
}
|
||||
|
||||
static inline void __iomem *plat_ioremap(phys_t offset, unsigned long size,
|
||||
unsigned long flags)
|
||||
{
|
||||
#define TXX9_DIRECTMAP_BASE 0xff000000ul
|
||||
if (offset >= TXX9_DIRECTMAP_BASE &&
|
||||
offset < TXX9_DIRECTMAP_BASE + 0xff0000)
|
||||
return (void __iomem *)offset;
|
||||
return NULL;
|
||||
}
|
||||
|
||||
static inline int plat_iounmap(const volatile void __iomem *addr)
|
||||
{
|
||||
return (unsigned long)addr >= TXX9_DIRECTMAP_BASE;
|
||||
}
|
||||
|
||||
#endif /* __ASM_MACH_TX39XX_IOREMAP_H */
|
23
arch/mips/include/asm/mach-tx39xx/mangle-port.h
Normal file
23
arch/mips/include/asm/mach-tx39xx/mangle-port.h
Normal file
@@ -0,0 +1,23 @@
|
||||
#ifndef __ASM_MACH_TX39XX_MANGLE_PORT_H
|
||||
#define __ASM_MACH_TX39XX_MANGLE_PORT_H
|
||||
|
||||
#if defined(CONFIG_TOSHIBA_JMR3927)
|
||||
extern unsigned long (*__swizzle_addr_b)(unsigned long port);
|
||||
#define NEEDS_TXX9_SWIZZLE_ADDR_B
|
||||
#else
|
||||
#define __swizzle_addr_b(port) (port)
|
||||
#endif
|
||||
#define __swizzle_addr_w(port) (port)
|
||||
#define __swizzle_addr_l(port) (port)
|
||||
#define __swizzle_addr_q(port) (port)
|
||||
|
||||
#define ioswabb(a, x) (x)
|
||||
#define __mem_ioswabb(a, x) (x)
|
||||
#define ioswabw(a, x) le16_to_cpu(x)
|
||||
#define __mem_ioswabw(a, x) (x)
|
||||
#define ioswabl(a, x) le32_to_cpu(x)
|
||||
#define __mem_ioswabl(a, x) (x)
|
||||
#define ioswabq(a, x) le64_to_cpu(x)
|
||||
#define __mem_ioswabq(a, x) (x)
|
||||
|
||||
#endif /* __ASM_MACH_TX39XX_MANGLE_PORT_H */
|
25
arch/mips/include/asm/mach-tx39xx/war.h
Normal file
25
arch/mips/include/asm/mach-tx39xx/war.h
Normal file
@@ -0,0 +1,25 @@
|
||||
/*
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
*
|
||||
* Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
|
||||
*/
|
||||
#ifndef __ASM_MIPS_MACH_TX39XX_WAR_H
|
||||
#define __ASM_MIPS_MACH_TX39XX_WAR_H
|
||||
|
||||
#define R4600_V1_INDEX_ICACHEOP_WAR 0
|
||||
#define R4600_V1_HIT_CACHEOP_WAR 0
|
||||
#define R4600_V2_HIT_CACHEOP_WAR 0
|
||||
#define R5432_CP0_INTERRUPT_WAR 0
|
||||
#define BCM1250_M3_WAR 0
|
||||
#define SIBYTE_1956_WAR 0
|
||||
#define MIPS4K_ICACHE_REFILL_WAR 0
|
||||
#define MIPS_CACHE_SYNC_WAR 0
|
||||
#define TX49XX_ICACHE_INDEX_INV_WAR 0
|
||||
#define RM9000_CDEX_SMP_WAR 0
|
||||
#define ICACHE_REFILLS_WORKAROUND_WAR 0
|
||||
#define R10000_LLSC_WAR 0
|
||||
#define MIPS34K_MISSED_ITLB_WAR 0
|
||||
|
||||
#endif /* __ASM_MIPS_MACH_TX39XX_WAR_H */
|
Reference in New Issue
Block a user