KVM: MIPS: Use common KVM implementation of MMU memory caches
Move to the common MMU memory cache implementation now that the common code and MIPS's existing code are semantically compatible. No functional change intended. Suggested-by: Christoffer Dall <christoffer.dall@arm.com> Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com> Message-Id: <20200703023545.8771-22-sean.j.christopherson@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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Paolo Bonzini

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0cdc739b66
commit
380f3a8b63
@@ -5,7 +5,6 @@ generated-y += syscall_table_64_n32.h
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generated-y += syscall_table_64_n64.h
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generated-y += syscall_table_64_o32.h
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generic-y += export.h
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generic-y += kvm_types.h
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generic-y += local64.h
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generic-y += mcs_spinlock.h
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generic-y += parport.h
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@@ -335,17 +335,6 @@ struct kvm_mips_tlb {
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long tlb_lo[2];
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};
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#define KVM_NR_MEM_OBJS 4
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/*
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* We don't want allocation failures within the mmu code, so we preallocate
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* enough memory for a single page fault in a cache.
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*/
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struct kvm_mmu_memory_cache {
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int nobjs;
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void *objects[KVM_NR_MEM_OBJS];
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};
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#define KVM_MIPS_AUX_FPU 0x1
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#define KVM_MIPS_AUX_MSA 0x2
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7
arch/mips/include/asm/kvm_types.h
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7
arch/mips/include/asm/kvm_types.h
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@@ -0,0 +1,7 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_MIPS_KVM_TYPES_H
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#define _ASM_MIPS_KVM_TYPES_H
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#define KVM_ARCH_NR_OBJS_PER_MEMORY_CACHE 4
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#endif /* _ASM_MIPS_KVM_TYPES_H */
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