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drm/i915/perf: leave GDT_CHICKEN_BITS programming in configs

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There will be a need for userspaces configurations to set this
register. We can apply the same model inside the kernel for test
configs.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20170803165812.2373-4-lionel.g.landwerlin@intel.com
This commit is contained in:
Lionel Landwerlin
2017-08-03 17:58:09 +01:00
parent 701f8231a2
commit 3802c5cb20
11 changed files with 12 additions and 7 deletions
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7
drivers/gpu/drm/i915/i915_perf.c
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@@ -1456,9 +1456,6 @@ static void config_oa_regs(struct drm_i915_private *dev_priv,
static int hsw_enable_metric_set(struct drm_i915_private *dev_priv,
const struct i915_oa_config *oa_config)
{
I915_WRITE(GDT_CHICKEN_BITS, (I915_READ(GDT_CHICKEN_BITS) |
GT_NOA_ENABLE));
/* PRM:
*
* OA unit is using “crclk” for its functionality. When trunk
@@ -1818,12 +1815,8 @@ static int gen8_enable_metric_set(struct drm_i915_private *dev_priv,
if (ret)
return ret;
I915_WRITE(GDT_CHICKEN_BITS, 0xA0);
config_oa_regs(dev_priv, oa_config->mux_regs, oa_config->mux_regs_len);
I915_WRITE(GDT_CHICKEN_BITS, 0x80);
config_oa_regs(dev_priv, oa_config->b_counter_regs,
oa_config->b_counter_regs_len);