MIPS: BCM63XX: Prepare irq code to handle different external irq hardware implementation.
External irq only works for 6348, change code to prepare support of other CPUs. Signed-off-by: Maxime Bizon <mbizon@freebox.fr> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2895/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle

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@@ -3,13 +3,11 @@
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#include <bcm63xx_cpu.h>
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#define IRQ_MIPS_BASE 0
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#define IRQ_INTERNAL_BASE 8
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#define IRQ_EXT_BASE (IRQ_MIPS_BASE + 3)
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#define IRQ_EXT_0 (IRQ_EXT_BASE + 0)
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#define IRQ_EXT_1 (IRQ_EXT_BASE + 1)
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#define IRQ_EXT_2 (IRQ_EXT_BASE + 2)
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#define IRQ_EXT_3 (IRQ_EXT_BASE + 3)
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#define IRQ_EXTERNAL_BASE 100
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#define IRQ_EXT_0 (IRQ_EXTERNAL_BASE + 0)
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#define IRQ_EXT_1 (IRQ_EXTERNAL_BASE + 1)
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#define IRQ_EXT_2 (IRQ_EXTERNAL_BASE + 2)
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#define IRQ_EXT_3 (IRQ_EXTERNAL_BASE + 3)
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#endif /* ! BCM63XX_IRQ_H_ */
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7
arch/mips/include/asm/mach-bcm63xx/irq.h
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7
arch/mips/include/asm/mach-bcm63xx/irq.h
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@@ -0,0 +1,7 @@
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#ifndef __ASM_MACH_BCM63XX_IRQ_H
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#define __ASM_MACH_BCM63XX_IRQ_H
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#define NR_IRQS 128
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#define MIPS_CPU_IRQ_BASE 0
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#endif
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