sh: machvec IO death.
This takes a bit of a sledgehammer to the machvec I/O routines. The iomem case requires no special casing and so can just be dropped outright. This only leaves the ioport casing for PCI and SuperIO mangling. With the SuperIO case going through the standard ioport mapping, it's possible to replace everything with generic routines. With this done the standard I/O routines are tidied up and NO_IOPORT now gets default-enabled for the vast majority of boards. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This commit is contained in:
Paul Mundt
@@ -20,6 +20,11 @@ obj-y := clkdev.o debugtraps.o dma-nommu.o dumpstack.o \
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syscalls_$(BITS).o time.o topology.o traps.o \
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traps_$(BITS).o unwinder.o
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ifndef CONFIG_GENERIC_IOMAP
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obj-y += iomap.o
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obj-$(CONFIG_HAS_IOPORT) += ioport.o
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endif
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obj-y += cpu/
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obj-$(CONFIG_VSYSCALL) += vsyscall/
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obj-$(CONFIG_SMP) += smp.o
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@@ -39,7 +44,6 @@ obj-$(CONFIG_DUMP_CODE) += disassemble.o
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obj-$(CONFIG_HIBERNATION) += swsusp.o
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obj-$(CONFIG_DWARF_UNWINDER) += dwarf.o
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obj-$(CONFIG_PERF_EVENTS) += perf_event.o perf_callchain.o
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obj-$(CONFIG_HAS_IOPORT) += io_generic.o
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obj-$(CONFIG_HAVE_HW_BREAKPOINT) += hw_breakpoint.o
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obj-$(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST) += localtimer.o
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@@ -1,180 +0,0 @@
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/*
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* arch/sh/kernel/io_generic.c
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*
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* Copyright (C) 2000 Niibe Yutaka
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* Copyright (C) 2005 - 2007 Paul Mundt
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*
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* Generic I/O routine. These can be used where a machine specific version
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* is not required.
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/module.h>
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#include <linux/io.h>
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#include <asm/machvec.h>
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#ifdef CONFIG_CPU_SH3
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/* SH3 has a PCMCIA bug that needs a dummy read from area 6 for a
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* workaround. */
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/* I'm not sure SH7709 has this kind of bug */
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#define dummy_read() __raw_readb(0xba000000)
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#else
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#define dummy_read()
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#endif
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unsigned long generic_io_base = 0;
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u8 generic_inb(unsigned long port)
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{
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return __raw_readb(__ioport_map(port, 1));
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}
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u16 generic_inw(unsigned long port)
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{
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return __raw_readw(__ioport_map(port, 2));
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}
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u32 generic_inl(unsigned long port)
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{
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return __raw_readl(__ioport_map(port, 4));
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}
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u8 generic_inb_p(unsigned long port)
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{
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unsigned long v = generic_inb(port);
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ctrl_delay();
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return v;
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}
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u16 generic_inw_p(unsigned long port)
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{
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unsigned long v = generic_inw(port);
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ctrl_delay();
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return v;
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}
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u32 generic_inl_p(unsigned long port)
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{
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unsigned long v = generic_inl(port);
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ctrl_delay();
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return v;
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}
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/*
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* insb/w/l all read a series of bytes/words/longs from a fixed port
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* address. However as the port address doesn't change we only need to
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* convert the port address to real address once.
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*/
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void generic_insb(unsigned long port, void *dst, unsigned long count)
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{
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__raw_readsb(__ioport_map(port, 1), dst, count);
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dummy_read();
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}
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void generic_insw(unsigned long port, void *dst, unsigned long count)
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{
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__raw_readsw(__ioport_map(port, 2), dst, count);
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dummy_read();
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}
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void generic_insl(unsigned long port, void *dst, unsigned long count)
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{
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__raw_readsl(__ioport_map(port, 4), dst, count);
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dummy_read();
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}
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void generic_outb(u8 b, unsigned long port)
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{
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__raw_writeb(b, __ioport_map(port, 1));
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}
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void generic_outw(u16 b, unsigned long port)
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{
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__raw_writew(b, __ioport_map(port, 2));
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}
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void generic_outl(u32 b, unsigned long port)
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{
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__raw_writel(b, __ioport_map(port, 4));
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}
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void generic_outb_p(u8 b, unsigned long port)
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{
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generic_outb(b, port);
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ctrl_delay();
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}
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void generic_outw_p(u16 b, unsigned long port)
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{
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generic_outw(b, port);
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ctrl_delay();
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}
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void generic_outl_p(u32 b, unsigned long port)
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{
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generic_outl(b, port);
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ctrl_delay();
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}
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/*
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* outsb/w/l all write a series of bytes/words/longs to a fixed port
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* address. However as the port address doesn't change we only need to
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* convert the port address to real address once.
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*/
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void generic_outsb(unsigned long port, const void *src, unsigned long count)
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{
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__raw_writesb(__ioport_map(port, 1), src, count);
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dummy_read();
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}
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void generic_outsw(unsigned long port, const void *src, unsigned long count)
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{
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__raw_writesw(__ioport_map(port, 2), src, count);
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dummy_read();
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}
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void generic_outsl(unsigned long port, const void *src, unsigned long count)
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{
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__raw_writesl(__ioport_map(port, 4), src, count);
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dummy_read();
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}
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void __iomem *generic_ioport_map(unsigned long addr, unsigned int size)
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{
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#ifdef P1SEG
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if (PXSEG(addr) >= P1SEG)
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return (void __iomem *)addr;
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#endif
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return (void __iomem *)(addr + generic_io_base);
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}
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void generic_ioport_unmap(void __iomem *addr)
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{
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}
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#ifndef CONFIG_GENERIC_IOMAP
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void __iomem *ioport_map(unsigned long port, unsigned int nr)
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{
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void __iomem *ret;
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ret = __ioport_map_trapped(port, nr);
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if (ret)
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return ret;
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return __ioport_map(port, nr);
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}
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EXPORT_SYMBOL(ioport_map);
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void ioport_unmap(void __iomem *addr)
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{
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sh_mv.mv_ioport_unmap(addr);
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}
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EXPORT_SYMBOL(ioport_unmap);
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#endif /* CONFIG_GENERIC_IOMAP */
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165
arch/sh/kernel/iomap.c
Normal file
165
arch/sh/kernel/iomap.c
Normal file
@@ -0,0 +1,165 @@
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/*
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* arch/sh/kernel/iomap.c
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*
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* Copyright (C) 2000 Niibe Yutaka
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* Copyright (C) 2005 - 2007 Paul Mundt
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/module.h>
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#include <linux/io.h>
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unsigned int ioread8(void __iomem *addr)
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{
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return readb(addr);
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}
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EXPORT_SYMBOL(ioread8);
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unsigned int ioread16(void __iomem *addr)
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{
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return readw(addr);
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}
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EXPORT_SYMBOL(ioread16);
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unsigned int ioread16be(void __iomem *addr)
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{
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return be16_to_cpu(__raw_readw(addr));
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}
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EXPORT_SYMBOL(ioread16be);
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unsigned int ioread32(void __iomem *addr)
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{
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return readl(addr);
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}
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EXPORT_SYMBOL(ioread32);
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unsigned int ioread32be(void __iomem *addr)
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{
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return be32_to_cpu(__raw_readl(addr));
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}
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EXPORT_SYMBOL(ioread32be);
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void iowrite8(u8 val, void __iomem *addr)
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{
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writeb(val, addr);
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}
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EXPORT_SYMBOL(iowrite8);
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void iowrite16(u16 val, void __iomem *addr)
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{
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writew(val, addr);
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}
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EXPORT_SYMBOL(iowrite16);
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void iowrite16be(u16 val, void __iomem *addr)
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{
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__raw_writew(cpu_to_be16(val), addr);
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}
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EXPORT_SYMBOL(iowrite16be);
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void iowrite32(u32 val, void __iomem *addr)
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{
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writel(val, addr);
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}
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EXPORT_SYMBOL(iowrite32);
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void iowrite32be(u32 val, void __iomem *addr)
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{
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__raw_writel(cpu_to_be32(val), addr);
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}
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EXPORT_SYMBOL(iowrite32be);
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/*
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* These are the "repeat MMIO read/write" functions.
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* Note the "__raw" accesses, since we don't want to
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* convert to CPU byte order. We write in "IO byte
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* order" (we also don't have IO barriers).
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*/
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static inline void mmio_insb(void __iomem *addr, u8 *dst, int count)
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{
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while (--count >= 0) {
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u8 data = __raw_readb(addr);
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*dst = data;
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dst++;
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}
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}
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static inline void mmio_insw(void __iomem *addr, u16 *dst, int count)
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{
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while (--count >= 0) {
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u16 data = __raw_readw(addr);
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*dst = data;
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dst++;
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}
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}
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static inline void mmio_insl(void __iomem *addr, u32 *dst, int count)
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{
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while (--count >= 0) {
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u32 data = __raw_readl(addr);
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*dst = data;
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dst++;
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}
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}
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static inline void mmio_outsb(void __iomem *addr, const u8 *src, int count)
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{
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while (--count >= 0) {
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__raw_writeb(*src, addr);
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src++;
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}
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}
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static inline void mmio_outsw(void __iomem *addr, const u16 *src, int count)
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{
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while (--count >= 0) {
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__raw_writew(*src, addr);
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src++;
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}
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}
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static inline void mmio_outsl(void __iomem *addr, const u32 *src, int count)
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{
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while (--count >= 0) {
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__raw_writel(*src, addr);
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src++;
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}
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}
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void ioread8_rep(void __iomem *addr, void *dst, unsigned long count)
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{
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mmio_insb(addr, dst, count);
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}
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EXPORT_SYMBOL(ioread8_rep);
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void ioread16_rep(void __iomem *addr, void *dst, unsigned long count)
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{
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mmio_insw(addr, dst, count);
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}
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EXPORT_SYMBOL(ioread16_rep);
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void ioread32_rep(void __iomem *addr, void *dst, unsigned long count)
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{
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mmio_insl(addr, dst, count);
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}
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EXPORT_SYMBOL(ioread32_rep);
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void iowrite8_rep(void __iomem *addr, const void *src, unsigned long count)
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{
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mmio_outsb(addr, src, count);
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}
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EXPORT_SYMBOL(iowrite8_rep);
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void iowrite16_rep(void __iomem *addr, const void *src, unsigned long count)
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{
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mmio_outsw(addr, src, count);
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}
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EXPORT_SYMBOL(iowrite16_rep);
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void iowrite32_rep(void __iomem *addr, const void *src, unsigned long count)
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{
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mmio_outsl(addr, src, count);
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}
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EXPORT_SYMBOL(iowrite32_rep);
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43
arch/sh/kernel/ioport.c
Normal file
43
arch/sh/kernel/ioport.c
Normal file
@@ -0,0 +1,43 @@
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/*
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* arch/sh/kernel/ioport.c
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*
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* Copyright (C) 2000 Niibe Yutaka
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* Copyright (C) 2005 - 2007 Paul Mundt
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/module.h>
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#include <linux/io.h>
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const unsigned long sh_io_port_base __read_mostly = -1;
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EXPORT_SYMBOL(sh_io_port_base);
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void __iomem *__ioport_map(unsigned long addr, unsigned int size)
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{
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if (sh_mv.mv_ioport_map)
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return sh_mv.mv_ioport_map(addr, size);
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return (void __iomem *)(addr + sh_io_port_base);
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}
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EXPORT_SYMBOL(__ioport_map);
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void __iomem *ioport_map(unsigned long port, unsigned int nr)
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{
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void __iomem *ret;
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ret = __ioport_map_trapped(port, nr);
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if (ret)
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return ret;
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return __ioport_map(port, nr);
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}
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EXPORT_SYMBOL(ioport_map);
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void ioport_unmap(void __iomem *addr)
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{
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if (sh_mv.mv_ioport_unmap)
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sh_mv.mv_ioport_unmap(addr);
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}
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EXPORT_SYMBOL(ioport_unmap);
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@@ -118,28 +118,6 @@ void __init sh_mv_setup(void)
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sh_mv.mv_##elem = generic_##elem; \
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} while (0)
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#ifdef CONFIG_HAS_IOPORT
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#ifdef P2SEG
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__set_io_port_base(P2SEG);
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#else
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__set_io_port_base(0);
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#endif
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mv_set(inb); mv_set(inw); mv_set(inl);
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mv_set(outb); mv_set(outw); mv_set(outl);
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mv_set(inb_p); mv_set(inw_p); mv_set(inl_p);
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mv_set(outb_p); mv_set(outw_p); mv_set(outl_p);
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mv_set(insb); mv_set(insw); mv_set(insl);
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mv_set(outsb); mv_set(outsw); mv_set(outsl);
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mv_set(ioport_map);
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mv_set(ioport_unmap);
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#endif
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mv_set(irq_demux);
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mv_set(mode_pins);
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mv_set(mem_init);
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Reference in New Issue
Block a user