media: omap3isp: Correctly set IO_OUT_SEL and VP_CLK_POL for CCP2 mode
ISP CSI1 module needs all the bits correctly set to work. Signed-off-by: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com> Signed-off-by: Pavel Machek <pavel@ucw.cz> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Tested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> # on Beagleboard-xM + MPT9P031 Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
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committed by
Mauro Carvalho Chehab

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9211434bad
commit
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@@ -87,6 +87,8 @@
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#define ISPCCP2_CTRL_PHY_SEL_MASK 0x1
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#define ISPCCP2_CTRL_PHY_SEL_SHIFT 1
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#define ISPCCP2_CTRL_IO_OUT_SEL (1 << 2)
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#define ISPCCP2_CTRL_IO_OUT_SEL_MASK 0x1
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#define ISPCCP2_CTRL_IO_OUT_SEL_SHIFT 2
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#define ISPCCP2_CTRL_MODE (1 << 4)
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#define ISPCCP2_CTRL_VP_CLK_FORCE_ON (1 << 9)
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#define ISPCCP2_CTRL_INV (1 << 10)
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@@ -94,6 +96,8 @@
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#define ISPCCP2_CTRL_INV_SHIFT 10
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#define ISPCCP2_CTRL_VP_ONLY_EN (1 << 11)
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#define ISPCCP2_CTRL_VP_CLK_POL (1 << 12)
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#define ISPCCP2_CTRL_VP_CLK_POL_MASK 0x1
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#define ISPCCP2_CTRL_VP_CLK_POL_SHIFT 12
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#define ISPCCP2_CTRL_VPCLK_DIV_SHIFT 15
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#define ISPCCP2_CTRL_VPCLK_DIV_MASK 0x1ffff /* [31:15] */
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#define ISPCCP2_CTRL_VP_OUT_CTRL_SHIFT 8 /* 3430 bits */
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