drm/i915: Add support for port enable/disable for dual link configuration
For Dual Link MIPI Panels, both Port A and Port C should be enabled during the MIPI encoder enabling sequence. Similarly, during the disabling sequence, both ports needs to be disabled. v2: Used for_each_dsi_port macro instead of for loop v3: Used intel_dsi->ports instead of dual_link var for dual link configuration check v4: Masking of the required MIPI port bits before writing proper values Signed-off-by: Gaurav K Singh <gaurav.k.singh@intel.com> Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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committed by
Daniel Vetter

parent
8edfbb8bfc
commit
369602d370
@@ -108,28 +108,41 @@ static void intel_dsi_port_enable(struct intel_encoder *encoder)
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struct drm_i915_private *dev_priv = dev->dev_private;
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struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
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struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
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enum port port = intel_dsi_pipe_to_port(intel_crtc->pipe);
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enum port port;
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u32 temp;
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/* assert ip_tg_enable signal */
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temp = I915_READ(MIPI_PORT_CTRL(port)) & ~LANE_CONFIGURATION_MASK;
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temp = temp | intel_dsi->port_bits;
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I915_WRITE(MIPI_PORT_CTRL(port), temp | DPI_ENABLE);
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POSTING_READ(MIPI_PORT_CTRL(port));
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for_each_dsi_port(port, intel_dsi->ports) {
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temp = I915_READ(MIPI_PORT_CTRL(port));
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temp &= ~LANE_CONFIGURATION_MASK;
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temp &= ~DUAL_LINK_MODE_MASK;
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if (intel_dsi->ports == ((1 << PORT_A) | (1 << PORT_C))) {
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temp |= (intel_dsi->dual_link - 1)
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<< DUAL_LINK_MODE_SHIFT;
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temp |= intel_crtc->pipe ?
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LANE_CONFIGURATION_DUAL_LINK_B :
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LANE_CONFIGURATION_DUAL_LINK_A;
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}
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/* assert ip_tg_enable signal */
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I915_WRITE(MIPI_PORT_CTRL(port), temp | DPI_ENABLE);
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POSTING_READ(MIPI_PORT_CTRL(port));
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}
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}
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static void intel_dsi_port_disable(struct intel_encoder *encoder)
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{
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struct drm_device *dev = encoder->base.dev;
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struct drm_i915_private *dev_priv = dev->dev_private;
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struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
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enum port port = intel_dsi_pipe_to_port(intel_crtc->pipe);
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struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
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enum port port;
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u32 temp;
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/* de-assert ip_tg_enable signal */
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temp = I915_READ(MIPI_PORT_CTRL(port));
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I915_WRITE(MIPI_PORT_CTRL(port), temp & ~DPI_ENABLE);
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POSTING_READ(MIPI_PORT_CTRL(port));
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for_each_dsi_port(port, intel_dsi->ports) {
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/* de-assert ip_tg_enable signal */
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temp = I915_READ(MIPI_PORT_CTRL(port));
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I915_WRITE(MIPI_PORT_CTRL(port), temp & ~DPI_ENABLE);
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POSTING_READ(MIPI_PORT_CTRL(port));
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}
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}
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static void intel_dsi_device_ready(struct intel_encoder *encoder)
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