s390/qdio: get rid of register asm

[ Upstream commit d3e2ff5436d6ee38b572ba5c01dc7994769bec54 ]

Reviewed-by: Benjamin Block <bblock@linux.ibm.com>
Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
Signed-off-by: Vasily Gorbik <gor@linux.ibm.com>
Stable-dep-of: 2862a2fdfae8 ("s390/qdio: fix do_sqbs() inline assembly constraint")
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Heiko Carstens
2021-06-22 15:26:16 +02:00
committed by Greg Kroah-Hartman
parent 9c9f253fc6
commit 3681a0287a
2 changed files with 46 additions and 41 deletions

View File

@@ -88,15 +88,15 @@ enum qdio_irq_states {
static inline int do_sqbs(u64 token, unsigned char state, int queue, static inline int do_sqbs(u64 token, unsigned char state, int queue,
int *start, int *count) int *start, int *count)
{ {
register unsigned long _ccq asm ("0") = *count;
register unsigned long _token asm ("1") = token;
unsigned long _queuestart = ((unsigned long)queue << 32) | *start; unsigned long _queuestart = ((unsigned long)queue << 32) | *start;
unsigned long _ccq = *count;
asm volatile( asm volatile(
" .insn rsy,0xeb000000008A,%1,0,0(%2)" " lgr 1,%[token]\n"
: "+d" (_ccq), "+d" (_queuestart) " .insn rsy,0xeb000000008a,%[qs],%[ccq],0(%[state])"
: "d" ((unsigned long)state), "d" (_token) : [ccq] "+&d" (_ccq), [qs] "+&d" (_queuestart)
: "memory", "cc"); : [state] "d" ((unsigned long)state), [token] "d" (token)
: "memory", "cc", "1");
*count = _ccq & 0xff; *count = _ccq & 0xff;
*start = _queuestart & 0xff; *start = _queuestart & 0xff;
@@ -106,16 +106,17 @@ static inline int do_sqbs(u64 token, unsigned char state, int queue,
static inline int do_eqbs(u64 token, unsigned char *state, int queue, static inline int do_eqbs(u64 token, unsigned char *state, int queue,
int *start, int *count, int ack) int *start, int *count, int ack)
{ {
register unsigned long _ccq asm ("0") = *count;
register unsigned long _token asm ("1") = token;
unsigned long _queuestart = ((unsigned long)queue << 32) | *start; unsigned long _queuestart = ((unsigned long)queue << 32) | *start;
unsigned long _state = (unsigned long)ack << 63; unsigned long _state = (unsigned long)ack << 63;
unsigned long _ccq = *count;
asm volatile( asm volatile(
" .insn rrf,0xB99c0000,%1,%2,0,0" " lgr 1,%[token]\n"
: "+d" (_ccq), "+d" (_queuestart), "+d" (_state) " .insn rrf,0xb99c0000,%[qs],%[state],%[ccq],0"
: "d" (_token) : [ccq] "+&d" (_ccq), [qs] "+&d" (_queuestart),
: "memory", "cc"); [state] "+&d" (_state)
: [token] "d" (token)
: "memory", "cc", "1");
*count = _ccq & 0xff; *count = _ccq & 0xff;
*start = _queuestart & 0xff; *start = _queuestart & 0xff;
*state = _state & 0xff; *state = _state & 0xff;

View File

@@ -31,38 +31,41 @@ MODULE_DESCRIPTION("QDIO base support");
MODULE_LICENSE("GPL"); MODULE_LICENSE("GPL");
static inline int do_siga_sync(unsigned long schid, static inline int do_siga_sync(unsigned long schid,
unsigned int out_mask, unsigned int in_mask, unsigned long out_mask, unsigned long in_mask,
unsigned int fc) unsigned int fc)
{ {
register unsigned long __fc asm ("0") = fc;
register unsigned long __schid asm ("1") = schid;
register unsigned long out asm ("2") = out_mask;
register unsigned long in asm ("3") = in_mask;
int cc; int cc;
asm volatile( asm volatile(
" lgr 0,%[fc]\n"
" lgr 1,%[schid]\n"
" lgr 2,%[out]\n"
" lgr 3,%[in]\n"
" siga 0\n" " siga 0\n"
" ipm %0\n" " ipm %[cc]\n"
" srl %0,28\n" " srl %[cc],28\n"
: "=d" (cc) : [cc] "=&d" (cc)
: "d" (__fc), "d" (__schid), "d" (out), "d" (in) : "cc"); : [fc] "d" (fc), [schid] "d" (schid),
[out] "d" (out_mask), [in] "d" (in_mask)
: "cc", "0", "1", "2", "3");
return cc; return cc;
} }
static inline int do_siga_input(unsigned long schid, unsigned int mask, static inline int do_siga_input(unsigned long schid, unsigned long mask,
unsigned int fc) unsigned long fc)
{ {
register unsigned long __fc asm ("0") = fc;
register unsigned long __schid asm ("1") = schid;
register unsigned long __mask asm ("2") = mask;
int cc; int cc;
asm volatile( asm volatile(
" lgr 0,%[fc]\n"
" lgr 1,%[schid]\n"
" lgr 2,%[mask]\n"
" siga 0\n" " siga 0\n"
" ipm %0\n" " ipm %[cc]\n"
" srl %0,28\n" " srl %[cc],28\n"
: "=d" (cc) : [cc] "=&d" (cc)
: "d" (__fc), "d" (__schid), "d" (__mask) : "cc"); : [fc] "d" (fc), [schid] "d" (schid), [mask] "d" (mask)
: "cc", "0", "1", "2");
return cc; return cc;
} }
@@ -78,23 +81,24 @@ static inline int do_siga_input(unsigned long schid, unsigned int mask,
* Note: For IQDC unicast queues only the highest priority queue is processed. * Note: For IQDC unicast queues only the highest priority queue is processed.
*/ */
static inline int do_siga_output(unsigned long schid, unsigned long mask, static inline int do_siga_output(unsigned long schid, unsigned long mask,
unsigned int *bb, unsigned int fc, unsigned int *bb, unsigned long fc,
unsigned long aob) unsigned long aob)
{ {
register unsigned long __fc asm("0") = fc;
register unsigned long __schid asm("1") = schid;
register unsigned long __mask asm("2") = mask;
register unsigned long __aob asm("3") = aob;
int cc; int cc;
asm volatile( asm volatile(
" lgr 0,%[fc]\n"
" lgr 1,%[schid]\n"
" lgr 2,%[mask]\n"
" lgr 3,%[aob]\n"
" siga 0\n" " siga 0\n"
" ipm %0\n" " lgr %[fc],0\n"
" srl %0,28\n" " ipm %[cc]\n"
: "=d" (cc), "+d" (__fc), "+d" (__aob) " srl %[cc],28\n"
: "d" (__schid), "d" (__mask) : [cc] "=&d" (cc), [fc] "+&d" (fc)
: "cc"); : [schid] "d" (schid), [mask] "d" (mask), [aob] "d" (aob)
*bb = __fc >> 31; : "cc", "0", "1", "2", "3");
*bb = fc >> 31;
return cc; return cc;
} }