DSA: Convert DSA comments to network-style comments
Convert DSA driver comments to network-style comments as reported by checkpatch.pl. Fix spelling error. Signed-off-by: Barry Grussling <barry@grussling.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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committed by
David S. Miller

parent
a0376db0f2
commit
3675c8d714
@@ -15,8 +15,7 @@
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#include <net/dsa.h>
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#include "mv88e6xxx.h"
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/*
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* If the switch's ADDR[4:0] strap pins are strapped to zero, it will
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/* If the switch's ADDR[4:0] strap pins are strapped to zero, it will
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* use all 32 SMI bus addresses on its SMI bus, and all switch registers
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* will be directly accessible on some {device address,register address}
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* pair. If the ADDR[4:0] pins are not strapped to zero, the switch
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@@ -48,30 +47,22 @@ int __mv88e6xxx_reg_read(struct mii_bus *bus, int sw_addr, int addr, int reg)
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if (sw_addr == 0)
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return mdiobus_read(bus, addr, reg);
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/*
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* Wait for the bus to become free.
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*/
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/* Wait for the bus to become free. */
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ret = mv88e6xxx_reg_wait_ready(bus, sw_addr);
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if (ret < 0)
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return ret;
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/*
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* Transmit the read command.
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*/
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/* Transmit the read command. */
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ret = mdiobus_write(bus, sw_addr, 0, 0x9800 | (addr << 5) | reg);
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if (ret < 0)
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return ret;
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/*
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* Wait for the read command to complete.
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*/
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/* Wait for the read command to complete. */
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ret = mv88e6xxx_reg_wait_ready(bus, sw_addr);
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if (ret < 0)
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return ret;
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/*
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* Read the data.
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*/
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/* Read the data. */
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ret = mdiobus_read(bus, sw_addr, 1);
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if (ret < 0)
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return ret;
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@@ -100,30 +91,22 @@ int __mv88e6xxx_reg_write(struct mii_bus *bus, int sw_addr, int addr,
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if (sw_addr == 0)
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return mdiobus_write(bus, addr, reg, val);
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/*
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* Wait for the bus to become free.
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*/
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/* Wait for the bus to become free. */
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ret = mv88e6xxx_reg_wait_ready(bus, sw_addr);
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if (ret < 0)
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return ret;
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/*
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* Transmit the data to write.
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*/
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/* Transmit the data to write. */
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ret = mdiobus_write(bus, sw_addr, 1, val);
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if (ret < 0)
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return ret;
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/*
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* Transmit the write command.
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*/
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/* Transmit the write command. */
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ret = mdiobus_write(bus, sw_addr, 0, 0x9400 | (addr << 5) | reg);
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if (ret < 0)
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return ret;
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/*
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* Wait for the write command to complete.
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*/
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/* Wait for the write command to complete. */
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ret = mv88e6xxx_reg_wait_ready(bus, sw_addr);
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if (ret < 0)
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return ret;
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@@ -146,9 +129,7 @@ int mv88e6xxx_reg_write(struct dsa_switch *ds, int addr, int reg, u16 val)
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int mv88e6xxx_config_prio(struct dsa_switch *ds)
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{
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/*
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* Configure the IP ToS mapping registers.
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*/
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/* Configure the IP ToS mapping registers. */
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REG_WRITE(REG_GLOBAL, 0x10, 0x0000);
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REG_WRITE(REG_GLOBAL, 0x11, 0x0000);
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REG_WRITE(REG_GLOBAL, 0x12, 0x5555);
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@@ -158,9 +139,7 @@ int mv88e6xxx_config_prio(struct dsa_switch *ds)
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REG_WRITE(REG_GLOBAL, 0x16, 0xffff);
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REG_WRITE(REG_GLOBAL, 0x17, 0xffff);
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/*
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* Configure the IEEE 802.1p priority mapping register.
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*/
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/* Configure the IEEE 802.1p priority mapping register. */
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REG_WRITE(REG_GLOBAL, 0x18, 0xfa41);
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return 0;
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@@ -183,14 +162,10 @@ int mv88e6xxx_set_addr_indirect(struct dsa_switch *ds, u8 *addr)
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for (i = 0; i < 6; i++) {
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int j;
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/*
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* Write the MAC address byte.
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*/
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/* Write the MAC address byte. */
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REG_WRITE(REG_GLOBAL2, 0x0d, 0x8000 | (i << 8) | addr[i]);
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/*
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* Wait for the write to complete.
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*/
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/* Wait for the write to complete. */
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for (j = 0; j < 16; j++) {
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ret = REG_READ(REG_GLOBAL2, 0x0d);
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if ((ret & 0x8000) == 0)
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@@ -282,8 +257,7 @@ static int mv88e6xxx_ppu_access_get(struct dsa_switch *ds)
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mutex_lock(&ps->ppu_mutex);
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/*
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* If the PHY polling unit is enabled, disable it so that
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/* If the PHY polling unit is enabled, disable it so that
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* we can access the PHY registers. If it was already
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* disabled, cancel the timer that is going to re-enable
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* it.
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@@ -307,9 +281,7 @@ static void mv88e6xxx_ppu_access_put(struct dsa_switch *ds)
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{
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struct mv88e6xxx_priv_state *ps = (void *)(ds + 1);
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/*
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* Schedule a timer to re-enable the PHY polling unit.
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*/
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/* Schedule a timer to re-enable the PHY polling unit. */
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mod_timer(&ps->ppu_timer, jiffies + msecs_to_jiffies(10));
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mutex_unlock(&ps->ppu_mutex);
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}
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@@ -431,14 +403,10 @@ static int mv88e6xxx_stats_snapshot(struct dsa_switch *ds, int port)
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{
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int ret;
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/*
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* Snapshot the hardware statistics counters for this port.
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*/
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/* Snapshot the hardware statistics counters for this port. */
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REG_WRITE(REG_GLOBAL, 0x1d, 0xdc00 | port);
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/*
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* Wait for the snapshotting to complete.
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*/
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/* Wait for the snapshotting to complete. */
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ret = mv88e6xxx_stats_wait(ds);
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if (ret < 0)
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return ret;
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@@ -502,9 +470,7 @@ void mv88e6xxx_get_ethtool_stats(struct dsa_switch *ds,
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return;
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}
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/*
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* Read each of the counters.
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*/
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/* Read each of the counters. */
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for (i = 0; i < nr_stats; i++) {
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struct mv88e6xxx_hw_stat *s = stats + i;
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u32 low;
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