amdgpu/soc15: make the pcie index/data registers constant.
These don't seem to change at runtime, and the initialisers are constant data. This could be improved by not selecting the apu/non-apu path on each pcie read/write access. Signed-off-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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committed by
Alex Deucher

parent
6cdb91e281
commit
35b31f7c64
@@ -101,7 +101,7 @@ static u32 soc15_pcie_rreg(struct amdgpu_device *adev, u32 reg)
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{
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unsigned long flags, address, data;
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u32 r;
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struct nbio_pcie_index_data *nbio_pcie_id;
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const struct nbio_pcie_index_data *nbio_pcie_id;
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if (adev->flags & AMD_IS_APU)
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nbio_pcie_id = &nbio_v7_0_pcie_index_data;
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@@ -122,7 +122,7 @@ static u32 soc15_pcie_rreg(struct amdgpu_device *adev, u32 reg)
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static void soc15_pcie_wreg(struct amdgpu_device *adev, u32 reg, u32 v)
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{
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unsigned long flags, address, data;
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struct nbio_pcie_index_data *nbio_pcie_id;
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const struct nbio_pcie_index_data *nbio_pcie_id;
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if (adev->flags & AMD_IS_APU)
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nbio_pcie_id = &nbio_v7_0_pcie_index_data;
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