drm/i915: Do RPM Wake during GuC/HuC status read
HUC_STATUS, GUC_STATUS, SOFT_SCRATCH registers are read in debugfs and getparam ioctl. This patch covers those accesses by RPM get/put. v2: Covering access in i915_getparam(I915_PARAM_HUC_STATUS) (ChrisW) Cc: Arkadiusz Hiler <arkadiusz.hiler@intel.com> Cc: Anusha Srivatsa <anusha.srivatsa@intel.com> Cc: Fiedorowicz, Lukasz <lukasz.fiedorowicz@intel.com> Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com> Reviewed-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1486110513-12130-1-git-send-email-sagar.a.kamble@intel.com
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committed by
Tvrtko Ursulin

parent
262fd485ac
commit
3582ad1361
@@ -2412,7 +2412,9 @@ static int i915_huc_load_status_info(struct seq_file *m, void *data)
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seq_printf(m, "\tRSA: offset is %d; size = %d\n",
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huc_fw->rsa_offset, huc_fw->rsa_size);
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intel_runtime_pm_get(dev_priv);
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seq_printf(m, "\nHuC status 0x%08x:\n", I915_READ(HUC_STATUS2));
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intel_runtime_pm_put(dev_priv);
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return 0;
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}
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@@ -2444,6 +2446,8 @@ static int i915_guc_load_status_info(struct seq_file *m, void *data)
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seq_printf(m, "\tRSA: offset is %d; size = %d\n",
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guc_fw->rsa_offset, guc_fw->rsa_size);
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intel_runtime_pm_get(dev_priv);
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tmp = I915_READ(GUC_STATUS);
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seq_printf(m, "\nGuC status 0x%08x:\n", tmp);
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@@ -2457,6 +2461,8 @@ static int i915_guc_load_status_info(struct seq_file *m, void *data)
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for (i = 0; i < 16; i++)
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seq_printf(m, "\t%2d: \t0x%x\n", i, I915_READ(SOFT_SCRATCH(i)));
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intel_runtime_pm_put(dev_priv);
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return 0;
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}
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