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net: davinci_cpdma: remove excessive dump of register values to kernel log

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Such a big dump of register values is hardly useful on a production
system.

Another downside of the now removed functions is that calling
emac_dump_regs resulted in at least 87 calls to dev_info while holding a
spinlock and having irqs off which is a big source of latency.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Uwe Kleine-König
2016-07-25 11:54:45 +02:00
committed by David S. Miller
parent 9b8ac4f9dd
commit 3568bdf041
3 changed files with 0 additions and 219 deletions
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121
drivers/net/ethernet/ti/davinci_cpdma.c
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@@ -97,8 +97,6 @@ enum cpdma_state {
CPDMA_STATE_TEARDOWN,
};
static const char *cpdma_state_str[] = { "idle", "active", "teardown" };
struct cpdma_ctlr {
enum cpdma_state state;
struct cpdma_params params;
@@ -357,77 +355,6 @@ int cpdma_ctlr_stop(struct cpdma_ctlr *ctlr)
}
EXPORT_SYMBOL_GPL(cpdma_ctlr_stop);
int cpdma_ctlr_dump(struct cpdma_ctlr *ctlr)
{
struct device *dev = ctlr->dev;
unsigned long flags;
int i;
spin_lock_irqsave(&ctlr->lock, flags);
dev_info(dev, "CPDMA: state: %s", cpdma_state_str[ctlr->state]);
dev_info(dev, "CPDMA: txidver: %x",
dma_reg_read(ctlr, CPDMA_TXIDVER));
dev_info(dev, "CPDMA: txcontrol: %x",
dma_reg_read(ctlr, CPDMA_TXCONTROL));
dev_info(dev, "CPDMA: txteardown: %x",
dma_reg_read(ctlr, CPDMA_TXTEARDOWN));
dev_info(dev, "CPDMA: rxidver: %x",
dma_reg_read(ctlr, CPDMA_RXIDVER));
dev_info(dev, "CPDMA: rxcontrol: %x",
dma_reg_read(ctlr, CPDMA_RXCONTROL));
dev_info(dev, "CPDMA: softreset: %x",
dma_reg_read(ctlr, CPDMA_SOFTRESET));
dev_info(dev, "CPDMA: rxteardown: %x",
dma_reg_read(ctlr, CPDMA_RXTEARDOWN));
dev_info(dev, "CPDMA: txintstatraw: %x",
dma_reg_read(ctlr, CPDMA_TXINTSTATRAW));
dev_info(dev, "CPDMA: txintstatmasked: %x",
dma_reg_read(ctlr, CPDMA_TXINTSTATMASKED));
dev_info(dev, "CPDMA: txintmaskset: %x",
dma_reg_read(ctlr, CPDMA_TXINTMASKSET));
dev_info(dev, "CPDMA: txintmaskclear: %x",
dma_reg_read(ctlr, CPDMA_TXINTMASKCLEAR));
dev_info(dev, "CPDMA: macinvector: %x",
dma_reg_read(ctlr, CPDMA_MACINVECTOR));
dev_info(dev, "CPDMA: maceoivector: %x",
dma_reg_read(ctlr, CPDMA_MACEOIVECTOR));
dev_info(dev, "CPDMA: rxintstatraw: %x",
dma_reg_read(ctlr, CPDMA_RXINTSTATRAW));
dev_info(dev, "CPDMA: rxintstatmasked: %x",
dma_reg_read(ctlr, CPDMA_RXINTSTATMASKED));
dev_info(dev, "CPDMA: rxintmaskset: %x",
dma_reg_read(ctlr, CPDMA_RXINTMASKSET));
dev_info(dev, "CPDMA: rxintmaskclear: %x",
dma_reg_read(ctlr, CPDMA_RXINTMASKCLEAR));
dev_info(dev, "CPDMA: dmaintstatraw: %x",
dma_reg_read(ctlr, CPDMA_DMAINTSTATRAW));
dev_info(dev, "CPDMA: dmaintstatmasked: %x",
dma_reg_read(ctlr, CPDMA_DMAINTSTATMASKED));
dev_info(dev, "CPDMA: dmaintmaskset: %x",
dma_reg_read(ctlr, CPDMA_DMAINTMASKSET));
dev_info(dev, "CPDMA: dmaintmaskclear: %x",
dma_reg_read(ctlr, CPDMA_DMAINTMASKCLEAR));
if (!ctlr->params.has_ext_regs) {
dev_info(dev, "CPDMA: dmacontrol: %x",
dma_reg_read(ctlr, CPDMA_DMACONTROL));
dev_info(dev, "CPDMA: dmastatus: %x",
dma_reg_read(ctlr, CPDMA_DMASTATUS));
dev_info(dev, "CPDMA: rxbuffofs: %x",
dma_reg_read(ctlr, CPDMA_RXBUFFOFS));
}
for (i = 0; i < ARRAY_SIZE(ctlr->channels); i++)
if (ctlr->channels[i])
cpdma_chan_dump(ctlr->channels[i]);
spin_unlock_irqrestore(&ctlr->lock, flags);
return 0;
}
EXPORT_SYMBOL_GPL(cpdma_ctlr_dump);
int cpdma_ctlr_destroy(struct cpdma_ctlr *ctlr)
{
unsigned long flags;
@@ -569,54 +496,6 @@ int cpdma_chan_get_stats(struct cpdma_chan *chan,
}
EXPORT_SYMBOL_GPL(cpdma_chan_get_stats);
int cpdma_chan_dump(struct cpdma_chan *chan)
{
unsigned long flags;
struct device *dev = chan->ctlr->dev;
spin_lock_irqsave(&chan->lock, flags);
dev_info(dev, "channel %d (%s %d) state %s",
chan->chan_num, is_rx_chan(chan) ? "rx" : "tx",
chan_linear(chan), cpdma_state_str[chan->state]);
dev_info(dev, "\thdp: %x\n", chan_read(chan, hdp));
dev_info(dev, "\tcp: %x\n", chan_read(chan, cp));
if (chan->rxfree) {
dev_info(dev, "\trxfree: %x\n",
chan_read(chan, rxfree));
}
dev_info(dev, "\tstats head_enqueue: %d\n",
chan->stats.head_enqueue);
dev_info(dev, "\tstats tail_enqueue: %d\n",
chan->stats.tail_enqueue);
dev_info(dev, "\tstats pad_enqueue: %d\n",
chan->stats.pad_enqueue);
dev_info(dev, "\tstats misqueued: %d\n",
chan->stats.misqueued);
dev_info(dev, "\tstats desc_alloc_fail: %d\n",
chan->stats.desc_alloc_fail);
dev_info(dev, "\tstats pad_alloc_fail: %d\n",
chan->stats.pad_alloc_fail);
dev_info(dev, "\tstats runt_receive_buff: %d\n",
chan->stats.runt_receive_buff);
dev_info(dev, "\tstats runt_transmit_buff: %d\n",
chan->stats.runt_transmit_buff);
dev_info(dev, "\tstats empty_dequeue: %d\n",
chan->stats.empty_dequeue);
dev_info(dev, "\tstats busy_dequeue: %d\n",
chan->stats.busy_dequeue);
dev_info(dev, "\tstats good_dequeue: %d\n",
chan->stats.good_dequeue);
dev_info(dev, "\tstats requeue: %d\n",
chan->stats.requeue);
dev_info(dev, "\tstats teardown_dequeue: %d\n",
chan->stats.teardown_dequeue);
spin_unlock_irqrestore(&chan->lock, flags);
return 0;
}
static void __cpdma_chan_submit(struct cpdma_chan *chan,
struct cpdma_desc __iomem *desc)
{