ARM: drivers: remove __dev* attributes.
CONFIG_HOTPLUG is going away as an option. As a result, the __dev* markings need to be removed. This change removes the use of __devinit, __devexit_p, __devinitdata, and __devexit from these drivers. Based on patches originally written by Bill Pemberton, but redone by me in order to handle some of the coding style issues better, by hand. Cc: Bill Pemberton <wfp5p@virginia.edu> Cc: Russell King <linux@arm.linux.org.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@@ -78,7 +78,7 @@ void pcibios_report_status(u_int status_mask, int warn)
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* Bug 3 is responsible for the sound DMA grinding to a halt. We now
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* live with bug 2.
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*/
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static void __devinit pci_fixup_83c553(struct pci_dev *dev)
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static void pci_fixup_83c553(struct pci_dev *dev)
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{
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/*
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* Set memory region to start at address 0, and enable IO
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@@ -130,7 +130,7 @@ static void __devinit pci_fixup_83c553(struct pci_dev *dev)
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}
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_83C553, pci_fixup_83c553);
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static void __devinit pci_fixup_unassign(struct pci_dev *dev)
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static void pci_fixup_unassign(struct pci_dev *dev)
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{
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dev->resource[0].end -= dev->resource[0].start;
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dev->resource[0].start = 0;
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@@ -142,7 +142,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_WINBOND2, PCI_DEVICE_ID_WINBOND2_89C940F,
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* if it is the host bridge by marking it as such. These resources are of
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* no consequence to the PCI layer (they are handled elsewhere).
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*/
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static void __devinit pci_fixup_dec21285(struct pci_dev *dev)
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static void pci_fixup_dec21285(struct pci_dev *dev)
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{
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int i;
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@@ -161,7 +161,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_21285, pci_fixup_d
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/*
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* PCI IDE controllers use non-standard I/O port decoding, respect it.
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*/
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static void __devinit pci_fixup_ide_bases(struct pci_dev *dev)
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static void pci_fixup_ide_bases(struct pci_dev *dev)
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{
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struct resource *r;
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int i;
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@@ -182,7 +182,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pci_fixup_ide_bases);
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/*
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* Put the DEC21142 to sleep
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*/
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static void __devinit pci_fixup_dec21142(struct pci_dev *dev)
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static void pci_fixup_dec21142(struct pci_dev *dev)
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{
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pci_write_config_dword(dev, 0x40, 0x80000000);
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}
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@@ -204,7 +204,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_21142, pci_fixup_d
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* functional. However, The CY82C693U _does not work_ in bus
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* master mode without locking the PCI bus solid.
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*/
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static void __devinit pci_fixup_cy82c693(struct pci_dev *dev)
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static void pci_fixup_cy82c693(struct pci_dev *dev)
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{
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if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE) {
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u32 base0, base1;
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@@ -254,7 +254,7 @@ static void __devinit pci_fixup_cy82c693(struct pci_dev *dev)
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}
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_CONTAQ, PCI_DEVICE_ID_CONTAQ_82C693, pci_fixup_cy82c693);
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static void __devinit pci_fixup_it8152(struct pci_dev *dev)
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static void pci_fixup_it8152(struct pci_dev *dev)
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{
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int i;
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/* fixup for ITE 8152 devices */
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@@ -361,9 +361,7 @@ void pcibios_fixup_bus(struct pci_bus *bus)
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printk(KERN_INFO "PCI: bus%d: Fast back to back transfers %sabled\n",
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bus->number, (features & PCI_COMMAND_FAST_BACK) ? "en" : "dis");
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}
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#ifdef CONFIG_HOTPLUG
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EXPORT_SYMBOL(pcibios_fixup_bus);
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#endif
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/*
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* Swizzle the device pin each time we cross a bridge. If a platform does
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@@ -380,7 +378,7 @@ EXPORT_SYMBOL(pcibios_fixup_bus);
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* PCI standard swizzle is implemented on plug-in cards and Cardbus based
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* PCI extenders, so it can not be ignored.
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*/
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static u8 __devinit pcibios_swizzle(struct pci_dev *dev, u8 *pin)
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static u8 pcibios_swizzle(struct pci_dev *dev, u8 *pin)
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{
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struct pci_sys_data *sys = dev->sysdata;
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int slot, oldpin = *pin;
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@@ -339,7 +339,7 @@ static struct miscdevice etb_miscdev = {
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.fops = &etb_fops,
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};
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static int __devinit etb_probe(struct amba_device *dev, const struct amba_id *id)
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static int etb_probe(struct amba_device *dev, const struct amba_id *id)
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{
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struct tracectx *t = &tracer;
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int ret = 0;
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@@ -531,7 +531,7 @@ static ssize_t trace_mode_store(struct kobject *kobj,
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static struct kobj_attribute trace_mode_attr =
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__ATTR(trace_mode, 0644, trace_mode_show, trace_mode_store);
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static int __devinit etm_probe(struct amba_device *dev, const struct amba_id *id)
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static int etm_probe(struct amba_device *dev, const struct amba_id *id)
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{
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struct tracectx *t = &tracer;
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int ret = 0;
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@@ -132,7 +132,7 @@ static int cpu_pmu_request_irq(struct arm_pmu *cpu_pmu, irq_handler_t handler)
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return 0;
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}
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static void __devinit cpu_pmu_init(struct arm_pmu *cpu_pmu)
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static void cpu_pmu_init(struct arm_pmu *cpu_pmu)
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{
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int cpu;
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for_each_possible_cpu(cpu) {
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@@ -178,7 +178,7 @@ static struct notifier_block __cpuinitdata cpu_pmu_hotplug_notifier = {
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/*
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* PMU platform driver and devicetree bindings.
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*/
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static struct of_device_id __devinitdata cpu_pmu_of_device_ids[] = {
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static struct of_device_id cpu_pmu_of_device_ids[] = {
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{.compatible = "arm,cortex-a15-pmu", .data = armv7_a15_pmu_init},
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{.compatible = "arm,cortex-a9-pmu", .data = armv7_a9_pmu_init},
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{.compatible = "arm,cortex-a8-pmu", .data = armv7_a8_pmu_init},
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@@ -190,7 +190,7 @@ static struct of_device_id __devinitdata cpu_pmu_of_device_ids[] = {
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{},
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};
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static struct platform_device_id __devinitdata cpu_pmu_plat_device_ids[] = {
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static struct platform_device_id cpu_pmu_plat_device_ids[] = {
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{.name = "arm-pmu"},
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{},
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};
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@@ -198,7 +198,7 @@ static struct platform_device_id __devinitdata cpu_pmu_plat_device_ids[] = {
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/*
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* CPU PMU identification and probing.
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*/
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static int __devinit probe_current_pmu(struct arm_pmu *pmu)
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static int probe_current_pmu(struct arm_pmu *pmu)
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{
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int cpu = get_cpu();
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unsigned long cpuid = read_cpuid_id();
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@@ -252,7 +252,7 @@ static int __devinit probe_current_pmu(struct arm_pmu *pmu)
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return ret;
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}
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static int __devinit cpu_pmu_device_probe(struct platform_device *pdev)
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static int cpu_pmu_device_probe(struct platform_device *pdev)
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{
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const struct of_device_id *of_id;
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int (*init_fn)(struct arm_pmu *);
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@@ -653,7 +653,7 @@ static int armv6_map_event(struct perf_event *event)
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&armv6_perf_cache_map, 0xFF);
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}
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static int __devinit armv6pmu_init(struct arm_pmu *cpu_pmu)
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static int armv6pmu_init(struct arm_pmu *cpu_pmu)
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{
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cpu_pmu->name = "v6";
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cpu_pmu->handle_irq = armv6pmu_handle_irq;
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@@ -685,7 +685,7 @@ static int armv6mpcore_map_event(struct perf_event *event)
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&armv6mpcore_perf_cache_map, 0xFF);
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}
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static int __devinit armv6mpcore_pmu_init(struct arm_pmu *cpu_pmu)
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static int armv6mpcore_pmu_init(struct arm_pmu *cpu_pmu)
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{
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cpu_pmu->name = "v6mpcore";
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cpu_pmu->handle_irq = armv6pmu_handle_irq;
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@@ -1226,7 +1226,7 @@ static void armv7pmu_init(struct arm_pmu *cpu_pmu)
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cpu_pmu->max_period = (1LLU << 32) - 1;
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};
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static u32 __devinit armv7_read_num_pmnc_events(void)
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static u32 armv7_read_num_pmnc_events(void)
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{
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u32 nb_cnt;
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@@ -1237,7 +1237,7 @@ static u32 __devinit armv7_read_num_pmnc_events(void)
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return nb_cnt + 1;
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}
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static int __devinit armv7_a8_pmu_init(struct arm_pmu *cpu_pmu)
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static int armv7_a8_pmu_init(struct arm_pmu *cpu_pmu)
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{
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armv7pmu_init(cpu_pmu);
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cpu_pmu->name = "ARMv7 Cortex-A8";
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@@ -1246,7 +1246,7 @@ static int __devinit armv7_a8_pmu_init(struct arm_pmu *cpu_pmu)
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return 0;
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}
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static int __devinit armv7_a9_pmu_init(struct arm_pmu *cpu_pmu)
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static int armv7_a9_pmu_init(struct arm_pmu *cpu_pmu)
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{
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armv7pmu_init(cpu_pmu);
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cpu_pmu->name = "ARMv7 Cortex-A9";
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@@ -1255,7 +1255,7 @@ static int __devinit armv7_a9_pmu_init(struct arm_pmu *cpu_pmu)
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return 0;
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}
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static int __devinit armv7_a5_pmu_init(struct arm_pmu *cpu_pmu)
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static int armv7_a5_pmu_init(struct arm_pmu *cpu_pmu)
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{
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armv7pmu_init(cpu_pmu);
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cpu_pmu->name = "ARMv7 Cortex-A5";
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@@ -1264,7 +1264,7 @@ static int __devinit armv7_a5_pmu_init(struct arm_pmu *cpu_pmu)
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return 0;
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}
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static int __devinit armv7_a15_pmu_init(struct arm_pmu *cpu_pmu)
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static int armv7_a15_pmu_init(struct arm_pmu *cpu_pmu)
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{
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armv7pmu_init(cpu_pmu);
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cpu_pmu->name = "ARMv7 Cortex-A15";
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@@ -1274,7 +1274,7 @@ static int __devinit armv7_a15_pmu_init(struct arm_pmu *cpu_pmu)
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return 0;
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}
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static int __devinit armv7_a7_pmu_init(struct arm_pmu *cpu_pmu)
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static int armv7_a7_pmu_init(struct arm_pmu *cpu_pmu)
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{
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armv7pmu_init(cpu_pmu);
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cpu_pmu->name = "ARMv7 Cortex-A7";
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@@ -440,7 +440,7 @@ static int xscale_map_event(struct perf_event *event)
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&xscale_perf_cache_map, 0xFF);
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}
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static int __devinit xscale1pmu_init(struct arm_pmu *cpu_pmu)
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static int xscale1pmu_init(struct arm_pmu *cpu_pmu)
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{
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cpu_pmu->name = "xscale1";
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cpu_pmu->handle_irq = xscale1pmu_handle_irq;
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@@ -810,7 +810,7 @@ static inline void xscale2pmu_write_counter(struct perf_event *event, u32 val)
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}
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}
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static int __devinit xscale2pmu_init(struct arm_pmu *cpu_pmu)
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static int xscale2pmu_init(struct arm_pmu *cpu_pmu)
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{
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cpu_pmu->name = "xscale2";
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cpu_pmu->handle_irq = xscale2pmu_handle_irq;
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