drm/radeon/kms: Add support for RLC init on SI
RLC handles the interrupt controller and other tasks on the GPU. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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Dave Airlie

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@@ -513,6 +513,23 @@
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#define CP_DEBUG 0xC1FC
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#define RLC_CNTL 0xC300
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# define RLC_ENABLE (1 << 0)
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#define RLC_RL_BASE 0xC304
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#define RLC_RL_SIZE 0xC308
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#define RLC_LB_CNTL 0xC30C
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#define RLC_SAVE_AND_RESTORE_BASE 0xC310
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#define RLC_LB_CNTR_MAX 0xC314
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#define RLC_LB_CNTR_INIT 0xC318
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#define RLC_CLEAR_STATE_RESTORE_BASE 0xC320
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#define RLC_UCODE_ADDR 0xC32C
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#define RLC_UCODE_DATA 0xC330
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#define RLC_MC_CNTL 0xC344
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#define RLC_UCODE_CNTL 0xC348
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#define VGT_EVENT_INITIATOR 0x28a90
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# define SAMPLE_STREAMOUTSTATS1 (1 << 0)
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# define SAMPLE_STREAMOUTSTATS2 (2 << 0)
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