Merge branch 'timers/vdso' into timers/core
so the hyper-v clocksource update can be applied.
This commit is contained in:
@@ -2747,3 +2747,42 @@ void iwl_fw_dbg_periodic_trig_handler(struct timer_list *t)
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jiffies + msecs_to_jiffies(collect_interval));
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}
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}
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#define FSEQ_REG(x) { .addr = (x), .str = #x, }
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void iwl_fw_error_print_fseq_regs(struct iwl_fw_runtime *fwrt)
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{
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struct iwl_trans *trans = fwrt->trans;
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unsigned long flags;
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int i;
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struct {
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u32 addr;
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const char *str;
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} fseq_regs[] = {
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FSEQ_REG(FSEQ_ERROR_CODE),
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FSEQ_REG(FSEQ_TOP_INIT_VERSION),
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FSEQ_REG(FSEQ_CNVIO_INIT_VERSION),
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FSEQ_REG(FSEQ_OTP_VERSION),
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FSEQ_REG(FSEQ_TOP_CONTENT_VERSION),
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FSEQ_REG(FSEQ_ALIVE_TOKEN),
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FSEQ_REG(FSEQ_CNVI_ID),
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FSEQ_REG(FSEQ_CNVR_ID),
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FSEQ_REG(CNVI_AUX_MISC_CHIP),
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FSEQ_REG(CNVR_AUX_MISC_CHIP),
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FSEQ_REG(CNVR_SCU_SD_REGS_SD_REG_DIG_DCDC_VTRIM),
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FSEQ_REG(CNVR_SCU_SD_REGS_SD_REG_ACTIVE_VDIG_MIRROR),
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};
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if (!iwl_trans_grab_nic_access(trans, &flags))
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return;
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IWL_ERR(fwrt, "Fseq Registers:\n");
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for (i = 0; i < ARRAY_SIZE(fseq_regs); i++)
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IWL_ERR(fwrt, "0x%08X | %s\n",
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iwl_read_prph_no_grab(trans, fseq_regs[i].addr),
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fseq_regs[i].str);
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iwl_trans_release_nic_access(trans, &flags);
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}
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IWL_EXPORT_SYMBOL(iwl_fw_error_print_fseq_regs);
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@@ -471,4 +471,6 @@ static inline void iwl_fw_error_collect(struct iwl_fw_runtime *fwrt)
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}
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void iwl_fw_dbg_periodic_trig_handler(struct timer_list *t);
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void iwl_fw_error_print_fseq_regs(struct iwl_fw_runtime *fwrt);
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#endif /* __iwl_fw_dbg_h__ */
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@@ -1597,7 +1597,6 @@ static void iwl_req_fw_callback(const struct firmware *ucode_raw, void *context)
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goto free;
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out_free_fw:
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iwl_dealloc_ucode(drv);
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release_firmware(ucode_raw);
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out_unbind:
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complete(&drv->request_firmware_complete);
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|
@@ -395,7 +395,11 @@ enum {
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WFPM_AUX_CTL_AUX_IF_MAC_OWNER_MSK = 0x80000000,
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};
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#define AUX_MISC_REG 0xA200B0
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#define CNVI_AUX_MISC_CHIP 0xA200B0
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#define CNVR_AUX_MISC_CHIP 0xA2B800
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#define CNVR_SCU_SD_REGS_SD_REG_DIG_DCDC_VTRIM 0xA29890
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#define CNVR_SCU_SD_REGS_SD_REG_ACTIVE_VDIG_MIRROR 0xA29938
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enum {
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HW_STEP_LOCATION_BITS = 24,
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};
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@@ -408,7 +412,12 @@ enum aux_misc_master1_en {
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#define AUX_MISC_MASTER1_SMPHR_STATUS 0xA20800
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#define RSA_ENABLE 0xA24B08
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#define PREG_AUX_BUS_WPROT_0 0xA04CC0
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#define PREG_PRPH_WPROT_0 0xA04CE0
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/* device family 9000 WPROT register */
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#define PREG_PRPH_WPROT_9000 0xA04CE0
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/* device family 22000 WPROT register */
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#define PREG_PRPH_WPROT_22000 0xA04D00
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#define SB_CPU_1_STATUS 0xA01E30
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#define SB_CPU_2_STATUS 0xA01E34
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#define UMAG_SB_CPU_1_STATUS 0xA038C0
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@@ -442,4 +451,13 @@ enum {
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#define UREG_DOORBELL_TO_ISR6 0xA05C04
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#define UREG_DOORBELL_TO_ISR6_NMI_BIT BIT(0)
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#define FSEQ_ERROR_CODE 0xA340C8
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#define FSEQ_TOP_INIT_VERSION 0xA34038
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#define FSEQ_CNVIO_INIT_VERSION 0xA3403C
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#define FSEQ_OTP_VERSION 0xA340FC
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#define FSEQ_TOP_CONTENT_VERSION 0xA340F4
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#define FSEQ_ALIVE_TOKEN 0xA340F0
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#define FSEQ_CNVI_ID 0xA3408C
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#define FSEQ_CNVR_ID 0xA34090
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#endif /* __iwl_prph_h__ */
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|
@@ -1972,26 +1972,6 @@ out:
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}
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}
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static void iwl_mvm_read_d3_sram(struct iwl_mvm *mvm)
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{
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#ifdef CONFIG_IWLWIFI_DEBUGFS
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const struct fw_img *img = &mvm->fw->img[IWL_UCODE_WOWLAN];
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u32 len = img->sec[IWL_UCODE_SECTION_DATA].len;
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u32 offs = img->sec[IWL_UCODE_SECTION_DATA].offset;
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if (!mvm->store_d3_resume_sram)
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return;
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if (!mvm->d3_resume_sram) {
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mvm->d3_resume_sram = kzalloc(len, GFP_KERNEL);
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if (!mvm->d3_resume_sram)
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return;
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}
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iwl_trans_read_mem_bytes(mvm->trans, offs, mvm->d3_resume_sram, len);
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#endif
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}
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static void iwl_mvm_d3_disconnect_iter(void *data, u8 *mac,
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struct ieee80211_vif *vif)
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{
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@@ -2054,8 +2034,6 @@ static int __iwl_mvm_resume(struct iwl_mvm *mvm, bool test)
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}
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iwl_fw_dbg_read_d3_debug_data(&mvm->fwrt);
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/* query SRAM first in case we want event logging */
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iwl_mvm_read_d3_sram(mvm);
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if (iwl_mvm_check_rt_status(mvm, vif)) {
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set_bit(STATUS_FW_ERROR, &mvm->trans->status);
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|
@@ -1557,59 +1557,6 @@ static ssize_t iwl_dbgfs_bcast_filters_macs_write(struct iwl_mvm *mvm,
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}
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#endif
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#ifdef CONFIG_PM_SLEEP
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static ssize_t iwl_dbgfs_d3_sram_write(struct iwl_mvm *mvm, char *buf,
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size_t count, loff_t *ppos)
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{
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int store;
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if (sscanf(buf, "%d", &store) != 1)
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return -EINVAL;
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mvm->store_d3_resume_sram = store;
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return count;
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}
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static ssize_t iwl_dbgfs_d3_sram_read(struct file *file, char __user *user_buf,
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size_t count, loff_t *ppos)
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{
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struct iwl_mvm *mvm = file->private_data;
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const struct fw_img *img;
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int ofs, len, pos = 0;
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size_t bufsz, ret;
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char *buf;
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u8 *ptr = mvm->d3_resume_sram;
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img = &mvm->fw->img[IWL_UCODE_WOWLAN];
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len = img->sec[IWL_UCODE_SECTION_DATA].len;
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bufsz = len * 4 + 256;
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buf = kzalloc(bufsz, GFP_KERNEL);
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if (!buf)
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return -ENOMEM;
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pos += scnprintf(buf, bufsz, "D3 SRAM capture: %sabled\n",
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mvm->store_d3_resume_sram ? "en" : "dis");
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if (ptr) {
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for (ofs = 0; ofs < len; ofs += 16) {
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pos += scnprintf(buf + pos, bufsz - pos,
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"0x%.4x %16ph\n", ofs, ptr + ofs);
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}
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} else {
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pos += scnprintf(buf + pos, bufsz - pos,
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"(no data captured)\n");
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}
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ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos);
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kfree(buf);
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return ret;
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}
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#endif
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#define PRINT_MVM_REF(ref) do { \
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if (mvm->refs[ref]) \
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pos += scnprintf(buf + pos, bufsz - pos, \
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@@ -1940,9 +1887,6 @@ MVM_DEBUGFS_READ_WRITE_FILE_OPS(bcast_filters, 256);
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MVM_DEBUGFS_READ_WRITE_FILE_OPS(bcast_filters_macs, 256);
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#endif
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#ifdef CONFIG_PM_SLEEP
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MVM_DEBUGFS_READ_WRITE_FILE_OPS(d3_sram, 8);
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#endif
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#ifdef CONFIG_ACPI
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MVM_DEBUGFS_READ_FILE_OPS(sar_geo_profile);
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#endif
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@@ -2159,7 +2103,6 @@ void iwl_mvm_dbgfs_register(struct iwl_mvm *mvm, struct dentry *dbgfs_dir)
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#endif
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#ifdef CONFIG_PM_SLEEP
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MVM_DEBUGFS_ADD_FILE(d3_sram, mvm->debugfs_dir, 0600);
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MVM_DEBUGFS_ADD_FILE(d3_test, mvm->debugfs_dir, 0400);
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debugfs_create_bool("d3_wake_sysassert", 0600, mvm->debugfs_dir,
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&mvm->d3_wake_sysassert);
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|
@@ -311,6 +311,8 @@ static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm,
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int ret;
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enum iwl_ucode_type old_type = mvm->fwrt.cur_fw_img;
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static const u16 alive_cmd[] = { MVM_ALIVE };
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bool run_in_rfkill =
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ucode_type == IWL_UCODE_INIT || iwl_mvm_has_unified_ucode(mvm);
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if (ucode_type == IWL_UCODE_REGULAR &&
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iwl_fw_dbg_conf_usniffer(mvm->fw, FW_DBG_START_FROM_ALIVE) &&
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@@ -328,7 +330,12 @@ static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm,
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||||
alive_cmd, ARRAY_SIZE(alive_cmd),
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||||
iwl_alive_fn, &alive_data);
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|
||||
ret = iwl_trans_start_fw(mvm->trans, fw, ucode_type == IWL_UCODE_INIT);
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||||
/*
|
||||
* We want to load the INIT firmware even in RFKILL
|
||||
* For the unified firmware case, the ucode_type is not
|
||||
* INIT, but we still need to run it.
|
||||
*/
|
||||
ret = iwl_trans_start_fw(mvm->trans, fw, run_in_rfkill);
|
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if (ret) {
|
||||
iwl_fw_set_current_image(&mvm->fwrt, old_type);
|
||||
iwl_remove_notification(&mvm->notif_wait, &alive_wait);
|
||||
@@ -433,7 +440,8 @@ static int iwl_run_unified_mvm_ucode(struct iwl_mvm *mvm, bool read_nvm)
|
||||
* commands
|
||||
*/
|
||||
ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(SYSTEM_GROUP,
|
||||
INIT_EXTENDED_CFG_CMD), 0,
|
||||
INIT_EXTENDED_CFG_CMD),
|
||||
CMD_SEND_IN_RFKILL,
|
||||
sizeof(init_cfg), &init_cfg);
|
||||
if (ret) {
|
||||
IWL_ERR(mvm, "Failed to run init config command: %d\n",
|
||||
@@ -457,7 +465,8 @@ static int iwl_run_unified_mvm_ucode(struct iwl_mvm *mvm, bool read_nvm)
|
||||
}
|
||||
|
||||
ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(REGULATORY_AND_NVM_GROUP,
|
||||
NVM_ACCESS_COMPLETE), 0,
|
||||
NVM_ACCESS_COMPLETE),
|
||||
CMD_SEND_IN_RFKILL,
|
||||
sizeof(nvm_complete), &nvm_complete);
|
||||
if (ret) {
|
||||
IWL_ERR(mvm, "Failed to run complete NVM access: %d\n",
|
||||
@@ -482,6 +491,8 @@ static int iwl_run_unified_mvm_ucode(struct iwl_mvm *mvm, bool read_nvm)
|
||||
}
|
||||
}
|
||||
|
||||
mvm->rfkill_safe_init_done = true;
|
||||
|
||||
return 0;
|
||||
|
||||
error:
|
||||
@@ -526,7 +537,7 @@ int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm, bool read_nvm)
|
||||
|
||||
lockdep_assert_held(&mvm->mutex);
|
||||
|
||||
if (WARN_ON_ONCE(mvm->calibrating))
|
||||
if (WARN_ON_ONCE(mvm->rfkill_safe_init_done))
|
||||
return 0;
|
||||
|
||||
iwl_init_notification_wait(&mvm->notif_wait,
|
||||
@@ -576,7 +587,7 @@ int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm, bool read_nvm)
|
||||
goto remove_notif;
|
||||
}
|
||||
|
||||
mvm->calibrating = true;
|
||||
mvm->rfkill_safe_init_done = true;
|
||||
|
||||
/* Send TX valid antennas before triggering calibrations */
|
||||
ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
|
||||
@@ -612,7 +623,7 @@ int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm, bool read_nvm)
|
||||
remove_notif:
|
||||
iwl_remove_notification(&mvm->notif_wait, &calib_wait);
|
||||
out:
|
||||
mvm->calibrating = false;
|
||||
mvm->rfkill_safe_init_done = false;
|
||||
if (iwlmvm_mod_params.init_dbg && !mvm->nvm_data) {
|
||||
/* we want to debug INIT and we have no NVM - fake */
|
||||
mvm->nvm_data = kzalloc(sizeof(struct iwl_nvm_data) +
|
||||
|
@@ -1209,7 +1209,7 @@ static void iwl_mvm_restart_cleanup(struct iwl_mvm *mvm)
|
||||
|
||||
mvm->scan_status = 0;
|
||||
mvm->ps_disabled = false;
|
||||
mvm->calibrating = false;
|
||||
mvm->rfkill_safe_init_done = false;
|
||||
|
||||
/* just in case one was running */
|
||||
iwl_mvm_cleanup_roc_te(mvm);
|
||||
|
@@ -880,7 +880,7 @@ struct iwl_mvm {
|
||||
struct iwl_mvm_vif *bf_allowed_vif;
|
||||
|
||||
bool hw_registered;
|
||||
bool calibrating;
|
||||
bool rfkill_safe_init_done;
|
||||
bool support_umac_log;
|
||||
|
||||
u32 ampdu_ref;
|
||||
@@ -1039,8 +1039,6 @@ struct iwl_mvm {
|
||||
#ifdef CONFIG_IWLWIFI_DEBUGFS
|
||||
bool d3_wake_sysassert;
|
||||
bool d3_test_active;
|
||||
bool store_d3_resume_sram;
|
||||
void *d3_resume_sram;
|
||||
u32 d3_test_pme_ptr;
|
||||
struct ieee80211_vif *keep_vif;
|
||||
u32 last_netdetect_scans; /* no. of scans in the last net-detect wake */
|
||||
|
@@ -918,9 +918,6 @@ static void iwl_op_mode_mvm_stop(struct iwl_op_mode *op_mode)
|
||||
kfree(mvm->error_recovery_buf);
|
||||
mvm->error_recovery_buf = NULL;
|
||||
|
||||
#if defined(CONFIG_PM_SLEEP) && defined(CONFIG_IWLWIFI_DEBUGFS)
|
||||
kfree(mvm->d3_resume_sram);
|
||||
#endif
|
||||
iwl_trans_op_mode_leave(mvm->trans);
|
||||
|
||||
iwl_phy_db_free(mvm->phy_db);
|
||||
@@ -1212,7 +1209,8 @@ void iwl_mvm_set_hw_ctkill_state(struct iwl_mvm *mvm, bool state)
|
||||
static bool iwl_mvm_set_hw_rfkill_state(struct iwl_op_mode *op_mode, bool state)
|
||||
{
|
||||
struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode);
|
||||
bool calibrating = READ_ONCE(mvm->calibrating);
|
||||
bool rfkill_safe_init_done = READ_ONCE(mvm->rfkill_safe_init_done);
|
||||
bool unified = iwl_mvm_has_unified_ucode(mvm);
|
||||
|
||||
if (state)
|
||||
set_bit(IWL_MVM_STATUS_HW_RFKILL, &mvm->status);
|
||||
@@ -1221,15 +1219,23 @@ static bool iwl_mvm_set_hw_rfkill_state(struct iwl_op_mode *op_mode, bool state)
|
||||
|
||||
iwl_mvm_set_rfkill_state(mvm);
|
||||
|
||||
/* iwl_run_init_mvm_ucode is waiting for results, abort it */
|
||||
if (calibrating)
|
||||
/* iwl_run_init_mvm_ucode is waiting for results, abort it. */
|
||||
if (rfkill_safe_init_done)
|
||||
iwl_abort_notification_waits(&mvm->notif_wait);
|
||||
|
||||
/*
|
||||
* Don't ask the transport to stop the firmware. We'll do it
|
||||
* after cfg80211 takes us down.
|
||||
*/
|
||||
if (unified)
|
||||
return false;
|
||||
|
||||
/*
|
||||
* Stop the device if we run OPERATIONAL firmware or if we are in the
|
||||
* middle of the calibrations.
|
||||
*/
|
||||
return state && (mvm->fwrt.cur_fw_img != IWL_UCODE_INIT || calibrating);
|
||||
return state && (mvm->fwrt.cur_fw_img != IWL_UCODE_INIT ||
|
||||
rfkill_safe_init_done);
|
||||
}
|
||||
|
||||
static void iwl_mvm_free_skb(struct iwl_op_mode *op_mode, struct sk_buff *skb)
|
||||
|
@@ -441,7 +441,8 @@ void rs_fw_rate_init(struct iwl_mvm *mvm, struct ieee80211_sta *sta,
|
||||
*/
|
||||
sta->max_amsdu_len = max_amsdu_len;
|
||||
|
||||
ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, sizeof(cfg_cmd), &cfg_cmd);
|
||||
ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, CMD_ASYNC, sizeof(cfg_cmd),
|
||||
&cfg_cmd);
|
||||
if (ret)
|
||||
IWL_ERR(mvm, "Failed to send rate scale config (%d)\n", ret);
|
||||
}
|
||||
|
@@ -596,6 +596,8 @@ void iwl_mvm_dump_nic_error_log(struct iwl_mvm *mvm)
|
||||
iwl_mvm_dump_lmac_error_log(mvm, 1);
|
||||
|
||||
iwl_mvm_dump_umac_error_log(mvm);
|
||||
|
||||
iwl_fw_error_print_fseq_regs(&mvm->fwrt);
|
||||
}
|
||||
|
||||
int iwl_mvm_reconfig_scd(struct iwl_mvm *mvm, int queue, int fifo, int sta_id,
|
||||
|
@@ -928,7 +928,7 @@ static inline void iwl_enable_rfkill_int(struct iwl_trans *trans)
|
||||
MSIX_HW_INT_CAUSES_REG_RF_KILL);
|
||||
}
|
||||
|
||||
if (trans->cfg->device_family == IWL_DEVICE_FAMILY_9000) {
|
||||
if (trans->cfg->device_family >= IWL_DEVICE_FAMILY_9000) {
|
||||
/*
|
||||
* On 9000-series devices this bit isn't enabled by default, so
|
||||
* when we power down the device we need set the bit to allow it
|
||||
|
@@ -1698,10 +1698,40 @@ static int iwl_pcie_init_msix_handler(struct pci_dev *pdev,
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int iwl_trans_pcie_clear_persistence_bit(struct iwl_trans *trans)
|
||||
{
|
||||
u32 hpm, wprot;
|
||||
|
||||
switch (trans->cfg->device_family) {
|
||||
case IWL_DEVICE_FAMILY_9000:
|
||||
wprot = PREG_PRPH_WPROT_9000;
|
||||
break;
|
||||
case IWL_DEVICE_FAMILY_22000:
|
||||
wprot = PREG_PRPH_WPROT_22000;
|
||||
break;
|
||||
default:
|
||||
return 0;
|
||||
}
|
||||
|
||||
hpm = iwl_read_umac_prph_no_grab(trans, HPM_DEBUG);
|
||||
if (hpm != 0xa5a5a5a0 && (hpm & PERSISTENCE_BIT)) {
|
||||
u32 wprot_val = iwl_read_umac_prph_no_grab(trans, wprot);
|
||||
|
||||
if (wprot_val & PREG_WFPM_ACCESS) {
|
||||
IWL_ERR(trans,
|
||||
"Error, can not clear persistence bit\n");
|
||||
return -EPERM;
|
||||
}
|
||||
iwl_write_umac_prph_no_grab(trans, HPM_DEBUG,
|
||||
hpm & ~PERSISTENCE_BIT);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int _iwl_trans_pcie_start_hw(struct iwl_trans *trans, bool low_power)
|
||||
{
|
||||
struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
|
||||
u32 hpm;
|
||||
int err;
|
||||
|
||||
lockdep_assert_held(&trans_pcie->mutex);
|
||||
@@ -1712,19 +1742,9 @@ static int _iwl_trans_pcie_start_hw(struct iwl_trans *trans, bool low_power)
|
||||
return err;
|
||||
}
|
||||
|
||||
hpm = iwl_read_umac_prph_no_grab(trans, HPM_DEBUG);
|
||||
if (hpm != 0xa5a5a5a0 && (hpm & PERSISTENCE_BIT)) {
|
||||
int wfpm_val = iwl_read_umac_prph_no_grab(trans,
|
||||
PREG_PRPH_WPROT_0);
|
||||
|
||||
if (wfpm_val & PREG_WFPM_ACCESS) {
|
||||
IWL_ERR(trans,
|
||||
"Error, can not clear persistence bit\n");
|
||||
return -EPERM;
|
||||
}
|
||||
iwl_write_umac_prph_no_grab(trans, HPM_DEBUG,
|
||||
hpm & ~PERSISTENCE_BIT);
|
||||
}
|
||||
err = iwl_trans_pcie_clear_persistence_bit(trans);
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
iwl_trans_pcie_sw_reset(trans);
|
||||
|
||||
@@ -3526,7 +3546,8 @@ struct iwl_trans *iwl_trans_pcie_alloc(struct pci_dev *pdev,
|
||||
hw_step |= ENABLE_WFPM;
|
||||
iwl_write_umac_prph_no_grab(trans, WFPM_CTRL_REG,
|
||||
hw_step);
|
||||
hw_step = iwl_read_prph_no_grab(trans, AUX_MISC_REG);
|
||||
hw_step = iwl_read_prph_no_grab(trans,
|
||||
CNVI_AUX_MISC_CHIP);
|
||||
hw_step = (hw_step >> HW_STEP_LOCATION_BITS) & 0xF;
|
||||
if (hw_step == 0x3)
|
||||
trans->hw_rev = (trans->hw_rev & 0xFFFFFFF3) |
|
||||
@@ -3577,7 +3598,9 @@ struct iwl_trans *iwl_trans_pcie_alloc(struct pci_dev *pdev,
|
||||
}
|
||||
} else if (CSR_HW_RF_ID_TYPE_CHIP_ID(trans->hw_rf_id) ==
|
||||
CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_HR) &&
|
||||
(trans->cfg != &iwl_ax200_cfg_cc ||
|
||||
((trans->cfg != &iwl_ax200_cfg_cc &&
|
||||
trans->cfg != &killer1650x_2ax_cfg &&
|
||||
trans->cfg != &killer1650w_2ax_cfg) ||
|
||||
trans->hw_rev == CSR_HW_REV_TYPE_QNJ_B0)) {
|
||||
u32 hw_status;
|
||||
|
||||
|
Reference in New Issue
Block a user