drm/imx: atomic phase 1: Use transitional atomic CRTC and plane helpers
Use the drm_plane_helper_update/disable() and drm_helper_crtc_mode_set() transitional atomic helpers. The crtc->mode_set_nofb callback is added so that the primary plane is no longer tied to the CRTC. Check/update logics are separated to make sure crtc->mode_set_nofb and plane->atomic_update are always successful. Also, some necessary logics are tweaked for a smooth transition. Signed-off-by: Liu Ying <gnuiyl@gmail.com> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
This commit is contained in:
Liu Ying
@@ -16,6 +16,7 @@
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#include <drm/drmP.h>
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#include <drm/drm_fb_cma_helper.h>
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#include <drm/drm_gem_cma_helper.h>
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#include <drm/drm_plane_helper.h>
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#include "video/imx-ipu-v3.h"
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#include "ipuv3-plane.h"
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@@ -53,12 +54,15 @@ int ipu_plane_irq(struct ipu_plane *ipu_plane)
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IPU_IRQ_EOF);
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}
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int ipu_plane_set_base(struct ipu_plane *ipu_plane, struct drm_framebuffer *fb,
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int x, int y)
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int ipu_plane_set_base(struct ipu_plane *ipu_plane, struct drm_framebuffer *fb)
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{
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struct drm_gem_cma_object *cma_obj[3];
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unsigned long eba, ubo, vbo;
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struct drm_gem_cma_object *cma_obj[3], *old_cma_obj[3];
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struct drm_plane_state *state = ipu_plane->base.state;
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struct drm_framebuffer *old_fb = state->fb;
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unsigned long eba, ubo, vbo, old_eba, old_ubo, old_vbo;
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int active, i;
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int x = state->src_x >> 16;
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int y = state->src_y >> 16;
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for (i = 0; i < drm_format_num_planes(fb->pixel_format); i++) {
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cma_obj[i] = drm_fb_cma_get_gem_obj(fb, i);
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@@ -68,6 +72,14 @@ int ipu_plane_set_base(struct ipu_plane *ipu_plane, struct drm_framebuffer *fb,
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}
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}
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for (i = 0; i < drm_format_num_planes(old_fb->pixel_format); i++) {
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old_cma_obj[i] = drm_fb_cma_get_gem_obj(old_fb, i);
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if (!old_cma_obj[i]) {
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DRM_DEBUG_KMS("plane %d entry is null.\n", i);
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return -EFAULT;
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}
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}
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eba = cma_obj[0]->paddr + fb->offsets[0] +
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fb->pitches[0] * y + (fb->bits_per_pixel >> 3) * x;
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@@ -81,13 +93,11 @@ int ipu_plane_set_base(struct ipu_plane *ipu_plane, struct drm_framebuffer *fb,
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return -EINVAL;
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}
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if (ipu_plane->enabled && fb->pitches[0] != ipu_plane->stride[0]) {
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if (fb->pitches[0] != old_fb->pitches[0]) {
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DRM_DEBUG_KMS("pitches must not change while plane is enabled.\n");
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return -EINVAL;
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}
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ipu_plane->stride[0] = fb->pitches[0];
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switch (fb->pixel_format) {
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case DRM_FORMAT_YUV420:
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case DRM_FORMAT_YVU420:
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@@ -104,6 +114,14 @@ int ipu_plane_set_base(struct ipu_plane *ipu_plane, struct drm_framebuffer *fb,
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vbo = cma_obj[2]->paddr + fb->offsets[2] +
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fb->pitches[2] * y / 2 + x / 2 - eba;
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old_eba = old_cma_obj[0]->paddr + old_fb->offsets[0] +
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old_fb->pitches[0] * y +
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(old_fb->bits_per_pixel >> 3) * x;
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old_ubo = old_cma_obj[1]->paddr + old_fb->offsets[1] +
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old_fb->pitches[1] * y / 2 + x / 2 - old_eba;
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old_vbo = old_cma_obj[2]->paddr + old_fb->offsets[2] +
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old_fb->pitches[2] * y / 2 + x / 2 - old_eba;
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if ((ubo & 0x7) || (vbo & 0x7)) {
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DRM_DEBUG_KMS("U/V buffer offsets must be a multiple of 8.\n");
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return -EINVAL;
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@@ -114,8 +132,7 @@ int ipu_plane_set_base(struct ipu_plane *ipu_plane, struct drm_framebuffer *fb,
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return -EINVAL;
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}
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if (ipu_plane->enabled && ((ipu_plane->u_offset != ubo) ||
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(ipu_plane->v_offset != vbo))) {
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if (old_ubo != ubo || old_vbo != vbo) {
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DRM_DEBUG_KMS("U/V buffer offsets must not change while plane is enabled.\n");
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return -EINVAL;
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}
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@@ -130,16 +147,11 @@ int ipu_plane_set_base(struct ipu_plane *ipu_plane, struct drm_framebuffer *fb,
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return -EINVAL;
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}
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if (ipu_plane->enabled &&
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(ipu_plane->stride[1] != fb->pitches[1])) {
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if (old_fb->pitches[1] != fb->pitches[1]) {
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DRM_DEBUG_KMS("U/V pitches must not change while plane is enabled.\n");
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return -EINVAL;
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}
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ipu_plane->u_offset = ubo;
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ipu_plane->v_offset = vbo;
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ipu_plane->stride[1] = fb->pitches[1];
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dev_dbg(ipu_plane->base.dev->dev,
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"phys = %pad %pad %pad, x = %d, y = %d",
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&cma_obj[0]->paddr, &cma_obj[1]->paddr,
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@@ -151,7 +163,104 @@ int ipu_plane_set_base(struct ipu_plane *ipu_plane, struct drm_framebuffer *fb,
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break;
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}
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if (ipu_plane->enabled) {
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active = ipu_idmac_get_current_buffer(ipu_plane->ipu_ch);
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ipu_cpmem_set_buffer(ipu_plane->ipu_ch, !active, eba);
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ipu_idmac_select_buffer(ipu_plane->ipu_ch, !active);
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return 0;
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}
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static inline unsigned long
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drm_plane_state_to_eba(struct drm_plane_state *state)
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{
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struct drm_framebuffer *fb = state->fb;
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struct drm_gem_cma_object *cma_obj;
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cma_obj = drm_fb_cma_get_gem_obj(fb, 0);
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BUG_ON(!cma_obj);
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return cma_obj->paddr + fb->offsets[0] +
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fb->pitches[0] * (state->src_y >> 16) +
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(fb->bits_per_pixel >> 3) * (state->src_x >> 16);
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}
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static inline unsigned long
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drm_plane_state_to_ubo(struct drm_plane_state *state)
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{
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struct drm_framebuffer *fb = state->fb;
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struct drm_gem_cma_object *cma_obj;
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unsigned long eba = drm_plane_state_to_eba(state);
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cma_obj = drm_fb_cma_get_gem_obj(fb, 1);
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BUG_ON(!cma_obj);
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return cma_obj->paddr + fb->offsets[1] +
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fb->pitches[1] * (state->src_y >> 16) / 2 +
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(state->src_x >> 16) / 2 - eba;
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}
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static inline unsigned long
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drm_plane_state_to_vbo(struct drm_plane_state *state)
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{
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struct drm_framebuffer *fb = state->fb;
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struct drm_gem_cma_object *cma_obj;
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unsigned long eba = drm_plane_state_to_eba(state);
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cma_obj = drm_fb_cma_get_gem_obj(fb, 2);
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BUG_ON(!cma_obj);
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return cma_obj->paddr + fb->offsets[2] +
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fb->pitches[2] * (state->src_y >> 16) / 2 +
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(state->src_x >> 16) / 2 - eba;
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}
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static void ipu_plane_atomic_set_base(struct ipu_plane *ipu_plane,
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struct drm_plane_state *old_state)
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{
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struct drm_plane *plane = &ipu_plane->base;
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struct drm_plane_state *state = plane->state;
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struct drm_framebuffer *fb = state->fb;
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unsigned long eba, ubo, vbo;
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int active;
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eba = drm_plane_state_to_eba(state);
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switch (fb->pixel_format) {
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case DRM_FORMAT_YUV420:
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case DRM_FORMAT_YVU420:
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if (old_state->fb)
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break;
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/*
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* Multiplanar formats have to meet the following restrictions:
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* - The (up to) three plane addresses are EBA, EBA+UBO, EBA+VBO
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* - EBA, UBO and VBO are a multiple of 8
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* - UBO and VBO are unsigned and not larger than 0xfffff8
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* - Only EBA may be changed while scanout is active
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* - The strides of U and V planes must be identical.
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*/
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ubo = drm_plane_state_to_ubo(state);
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vbo = drm_plane_state_to_vbo(state);
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if (fb->pixel_format == DRM_FORMAT_YUV420)
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ipu_cpmem_set_yuv_planar_full(ipu_plane->ipu_ch,
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fb->pitches[1], ubo, vbo);
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else
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ipu_cpmem_set_yuv_planar_full(ipu_plane->ipu_ch,
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fb->pitches[1], vbo, ubo);
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dev_dbg(ipu_plane->base.dev->dev,
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"phy = %lu %lu %lu, x = %d, y = %d", eba, ubo, vbo,
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state->src_x >> 16, state->src_y >> 16);
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break;
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default:
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dev_dbg(ipu_plane->base.dev->dev, "phys = %lu, x = %d, y = %d",
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eba, state->src_x >> 16, state->src_y >> 16);
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break;
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}
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if (old_state->fb) {
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active = ipu_idmac_get_current_buffer(ipu_plane->ipu_ch);
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ipu_cpmem_set_buffer(ipu_plane->ipu_ch, !active, eba);
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ipu_idmac_select_buffer(ipu_plane->ipu_ch, !active);
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@@ -159,156 +268,6 @@ int ipu_plane_set_base(struct ipu_plane *ipu_plane, struct drm_framebuffer *fb,
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ipu_cpmem_set_buffer(ipu_plane->ipu_ch, 0, eba);
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ipu_cpmem_set_buffer(ipu_plane->ipu_ch, 1, eba);
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}
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/* cache offsets for subsequent pageflips */
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ipu_plane->x = x;
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ipu_plane->y = y;
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return 0;
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}
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int ipu_plane_mode_set(struct ipu_plane *ipu_plane, struct drm_crtc *crtc,
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struct drm_display_mode *mode,
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struct drm_framebuffer *fb, int crtc_x, int crtc_y,
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unsigned int crtc_w, unsigned int crtc_h,
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uint32_t src_x, uint32_t src_y,
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uint32_t src_w, uint32_t src_h, bool interlaced)
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{
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struct device *dev = ipu_plane->base.dev->dev;
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int ret;
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/* no scaling */
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if (src_w != crtc_w || src_h != crtc_h)
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return -EINVAL;
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if (ipu_plane->base.type == DRM_PLANE_TYPE_PRIMARY) {
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/* full plane doesn't support partial off screen */
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if (crtc_x || crtc_y || crtc_w != mode->hdisplay ||
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crtc_h != mode->vdisplay)
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return -EINVAL;
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/* full plane minimum width is 13 pixels */
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if (crtc_w < 13)
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return -EINVAL;
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} else if (ipu_plane->base.type == DRM_PLANE_TYPE_OVERLAY) {
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/* clip to crtc bounds */
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if (crtc_x < 0) {
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if (-crtc_x > crtc_w)
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return -EINVAL;
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src_x += -crtc_x;
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src_w -= -crtc_x;
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crtc_w -= -crtc_x;
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crtc_x = 0;
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}
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if (crtc_y < 0) {
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if (-crtc_y > crtc_h)
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return -EINVAL;
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src_y += -crtc_y;
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src_h -= -crtc_y;
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crtc_h -= -crtc_y;
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crtc_y = 0;
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}
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if (crtc_x + crtc_w > mode->hdisplay) {
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if (crtc_x > mode->hdisplay)
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return -EINVAL;
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crtc_w = mode->hdisplay - crtc_x;
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src_w = crtc_w;
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}
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if (crtc_y + crtc_h > mode->vdisplay) {
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if (crtc_y > mode->vdisplay)
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return -EINVAL;
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crtc_h = mode->vdisplay - crtc_y;
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src_h = crtc_h;
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}
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} else
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return -EINVAL;
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if (crtc_h < 2)
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return -EINVAL;
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/*
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* since we cannot touch active IDMAC channels, we do not support
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* resizing the enabled plane or changing its format
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*/
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if (ipu_plane->enabled) {
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if (src_w != ipu_plane->w || src_h != ipu_plane->h ||
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fb->pixel_format != ipu_plane->base.fb->pixel_format)
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return -EINVAL;
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return ipu_plane_set_base(ipu_plane, fb, src_x, src_y);
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}
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switch (ipu_plane->dp_flow) {
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case IPU_DP_FLOW_SYNC_BG:
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ret = ipu_dp_setup_channel(ipu_plane->dp,
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IPUV3_COLORSPACE_RGB,
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IPUV3_COLORSPACE_RGB);
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if (ret) {
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dev_err(dev,
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"initializing display processor failed with %d\n",
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ret);
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return ret;
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}
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ipu_dp_set_global_alpha(ipu_plane->dp, true, 0, true);
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break;
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case IPU_DP_FLOW_SYNC_FG:
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ipu_dp_setup_channel(ipu_plane->dp,
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ipu_drm_fourcc_to_colorspace(fb->pixel_format),
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IPUV3_COLORSPACE_UNKNOWN);
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ipu_dp_set_window_pos(ipu_plane->dp, crtc_x, crtc_y);
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/* Enable local alpha on partial plane */
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switch (fb->pixel_format) {
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case DRM_FORMAT_ARGB1555:
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case DRM_FORMAT_ABGR1555:
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case DRM_FORMAT_RGBA5551:
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case DRM_FORMAT_BGRA5551:
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case DRM_FORMAT_ARGB4444:
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case DRM_FORMAT_ARGB8888:
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case DRM_FORMAT_ABGR8888:
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case DRM_FORMAT_RGBA8888:
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case DRM_FORMAT_BGRA8888:
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ipu_dp_set_global_alpha(ipu_plane->dp, false, 0, false);
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break;
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default:
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break;
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}
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}
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ipu_dmfc_config_wait4eot(ipu_plane->dmfc, crtc_w);
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ipu_cpmem_zero(ipu_plane->ipu_ch);
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ipu_cpmem_set_resolution(ipu_plane->ipu_ch, src_w, src_h);
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ret = ipu_cpmem_set_fmt(ipu_plane->ipu_ch, fb->pixel_format);
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if (ret < 0) {
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dev_err(dev, "unsupported pixel format 0x%08x\n",
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fb->pixel_format);
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return ret;
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}
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ipu_cpmem_set_high_priority(ipu_plane->ipu_ch);
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ipu_idmac_set_double_buffer(ipu_plane->ipu_ch, 1);
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ipu_cpmem_set_stride(ipu_plane->ipu_ch, fb->pitches[0]);
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ret = ipu_plane_set_base(ipu_plane, fb, src_x, src_y);
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if (ret < 0)
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return ret;
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if (interlaced)
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ipu_cpmem_interlaced_scan(ipu_plane->ipu_ch, fb->pitches[0]);
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if (fb->pixel_format == DRM_FORMAT_YUV420) {
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ipu_cpmem_set_yuv_planar_full(ipu_plane->ipu_ch,
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ipu_plane->stride[1],
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ipu_plane->u_offset,
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ipu_plane->v_offset);
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} else if (fb->pixel_format == DRM_FORMAT_YVU420) {
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ipu_cpmem_set_yuv_planar_full(ipu_plane->ipu_ch,
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ipu_plane->stride[1],
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ipu_plane->v_offset,
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ipu_plane->u_offset);
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}
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ipu_plane->w = src_w;
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ipu_plane->h = src_h;
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return 0;
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}
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void ipu_plane_put_resources(struct ipu_plane *ipu_plane)
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@@ -355,7 +314,7 @@ err_out:
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return ret;
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}
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void ipu_plane_enable(struct ipu_plane *ipu_plane)
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static void ipu_plane_enable(struct ipu_plane *ipu_plane)
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{
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if (ipu_plane->dp)
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ipu_dp_enable(ipu_plane->ipu);
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@@ -363,14 +322,10 @@ void ipu_plane_enable(struct ipu_plane *ipu_plane)
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ipu_idmac_enable_channel(ipu_plane->ipu_ch);
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if (ipu_plane->dp)
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ipu_dp_enable_channel(ipu_plane->dp);
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ipu_plane->enabled = true;
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}
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void ipu_plane_disable(struct ipu_plane *ipu_plane)
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static void ipu_plane_disable(struct ipu_plane *ipu_plane)
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{
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ipu_plane->enabled = false;
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ipu_idmac_wait_busy(ipu_plane->ipu_ch, 50);
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if (ipu_plane->dp)
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@@ -381,55 +336,13 @@ void ipu_plane_disable(struct ipu_plane *ipu_plane)
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ipu_dp_disable(ipu_plane->ipu);
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}
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/*
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* drm_plane API
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*/
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static int ipu_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
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struct drm_framebuffer *fb, int crtc_x, int crtc_y,
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unsigned int crtc_w, unsigned int crtc_h,
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uint32_t src_x, uint32_t src_y,
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uint32_t src_w, uint32_t src_h)
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{
|
||||
struct ipu_plane *ipu_plane = to_ipu_plane(plane);
|
||||
int ret = 0;
|
||||
|
||||
DRM_DEBUG_KMS("plane - %p\n", plane);
|
||||
|
||||
if (!ipu_plane->enabled)
|
||||
ret = ipu_plane_get_resources(ipu_plane);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
ret = ipu_plane_mode_set(ipu_plane, crtc, &crtc->hwmode, fb,
|
||||
crtc_x, crtc_y, crtc_w, crtc_h,
|
||||
src_x >> 16, src_y >> 16, src_w >> 16, src_h >> 16,
|
||||
false);
|
||||
if (ret < 0) {
|
||||
ipu_plane_put_resources(ipu_plane);
|
||||
return ret;
|
||||
}
|
||||
|
||||
if (crtc != plane->crtc)
|
||||
dev_dbg(plane->dev->dev, "crtc change: %p -> %p\n",
|
||||
plane->crtc, crtc);
|
||||
|
||||
if (!ipu_plane->enabled)
|
||||
ipu_plane_enable(ipu_plane);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ipu_disable_plane(struct drm_plane *plane)
|
||||
{
|
||||
struct ipu_plane *ipu_plane = to_ipu_plane(plane);
|
||||
|
||||
DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
|
||||
|
||||
if (ipu_plane->enabled)
|
||||
ipu_plane_disable(ipu_plane);
|
||||
|
||||
ipu_plane_put_resources(ipu_plane);
|
||||
ipu_plane_disable(ipu_plane);
|
||||
|
||||
return 0;
|
||||
}
|
||||
@@ -446,11 +359,195 @@ static void ipu_plane_destroy(struct drm_plane *plane)
|
||||
}
|
||||
|
||||
static const struct drm_plane_funcs ipu_plane_funcs = {
|
||||
.update_plane = ipu_update_plane,
|
||||
.disable_plane = ipu_disable_plane,
|
||||
.update_plane = drm_plane_helper_update,
|
||||
.disable_plane = drm_plane_helper_disable,
|
||||
.destroy = ipu_plane_destroy,
|
||||
};
|
||||
|
||||
static int ipu_plane_atomic_check(struct drm_plane *plane,
|
||||
struct drm_plane_state *state)
|
||||
{
|
||||
struct drm_plane_state *old_state = plane->state;
|
||||
struct drm_crtc_state *crtc_state;
|
||||
struct device *dev = plane->dev->dev;
|
||||
struct drm_framebuffer *fb = state->fb;
|
||||
struct drm_framebuffer *old_fb = old_state->fb;
|
||||
unsigned long eba, ubo, vbo, old_ubo, old_vbo;
|
||||
|
||||
/* Ok to disable */
|
||||
if (!fb)
|
||||
return old_fb ? 0 : -EINVAL;
|
||||
|
||||
/* CRTC should be enabled */
|
||||
if (!state->crtc->enabled)
|
||||
return -EINVAL;
|
||||
|
||||
/* no scaling */
|
||||
if (state->src_w >> 16 != state->crtc_w ||
|
||||
state->src_h >> 16 != state->crtc_h)
|
||||
return -EINVAL;
|
||||
|
||||
crtc_state = state->crtc->state;
|
||||
|
||||
switch (plane->type) {
|
||||
case DRM_PLANE_TYPE_PRIMARY:
|
||||
/* full plane doesn't support partial off screen */
|
||||
if (state->crtc_x || state->crtc_y ||
|
||||
state->crtc_w != crtc_state->adjusted_mode.hdisplay ||
|
||||
state->crtc_h != crtc_state->adjusted_mode.vdisplay)
|
||||
return -EINVAL;
|
||||
|
||||
/* full plane minimum width is 13 pixels */
|
||||
if (state->crtc_w < 13)
|
||||
return -EINVAL;
|
||||
break;
|
||||
case DRM_PLANE_TYPE_OVERLAY:
|
||||
if (state->crtc_x < 0 || state->crtc_y < 0)
|
||||
return -EINVAL;
|
||||
|
||||
if (state->crtc_x + state->crtc_w >
|
||||
crtc_state->adjusted_mode.hdisplay)
|
||||
return -EINVAL;
|
||||
if (state->crtc_y + state->crtc_h >
|
||||
crtc_state->adjusted_mode.vdisplay)
|
||||
return -EINVAL;
|
||||
break;
|
||||
default:
|
||||
dev_warn(dev, "Unsupported plane type\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if (state->crtc_h < 2)
|
||||
return -EINVAL;
|
||||
|
||||
/*
|
||||
* since we cannot touch active IDMAC channels, we do not support
|
||||
* resizing the enabled plane or changing its format
|
||||
*/
|
||||
if (old_fb && (state->src_w != old_state->src_w ||
|
||||
state->src_h != old_state->src_h ||
|
||||
fb->pixel_format != old_fb->pixel_format))
|
||||
return -EINVAL;
|
||||
|
||||
eba = drm_plane_state_to_eba(state);
|
||||
|
||||
if (eba & 0x7)
|
||||
return -EINVAL;
|
||||
|
||||
if (fb->pitches[0] < 1 || fb->pitches[0] > 16384)
|
||||
return -EINVAL;
|
||||
|
||||
if (old_fb && fb->pitches[0] != old_fb->pitches[0])
|
||||
return -EINVAL;
|
||||
|
||||
switch (fb->pixel_format) {
|
||||
case DRM_FORMAT_YUV420:
|
||||
case DRM_FORMAT_YVU420:
|
||||
/*
|
||||
* Multiplanar formats have to meet the following restrictions:
|
||||
* - The (up to) three plane addresses are EBA, EBA+UBO, EBA+VBO
|
||||
* - EBA, UBO and VBO are a multiple of 8
|
||||
* - UBO and VBO are unsigned and not larger than 0xfffff8
|
||||
* - Only EBA may be changed while scanout is active
|
||||
* - The strides of U and V planes must be identical.
|
||||
*/
|
||||
ubo = drm_plane_state_to_ubo(state);
|
||||
vbo = drm_plane_state_to_vbo(state);
|
||||
|
||||
if ((ubo & 0x7) || (vbo & 0x7))
|
||||
return -EINVAL;
|
||||
|
||||
if ((ubo > 0xfffff8) || (vbo > 0xfffff8))
|
||||
return -EINVAL;
|
||||
|
||||
if (old_fb) {
|
||||
old_ubo = drm_plane_state_to_ubo(old_state);
|
||||
old_vbo = drm_plane_state_to_vbo(old_state);
|
||||
if (ubo != old_ubo || vbo != old_vbo)
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if (fb->pitches[1] != fb->pitches[2])
|
||||
return -EINVAL;
|
||||
|
||||
if (fb->pitches[1] < 1 || fb->pitches[1] > 16384)
|
||||
return -EINVAL;
|
||||
|
||||
if (old_fb && old_fb->pitches[1] != fb->pitches[1])
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void ipu_plane_atomic_disable(struct drm_plane *plane,
|
||||
struct drm_plane_state *old_state)
|
||||
{
|
||||
ipu_disable_plane(plane);
|
||||
}
|
||||
|
||||
static void ipu_plane_atomic_update(struct drm_plane *plane,
|
||||
struct drm_plane_state *old_state)
|
||||
{
|
||||
struct ipu_plane *ipu_plane = to_ipu_plane(plane);
|
||||
struct drm_plane_state *state = plane->state;
|
||||
enum ipu_color_space ics;
|
||||
|
||||
if (old_state->fb) {
|
||||
ipu_plane_atomic_set_base(ipu_plane, old_state);
|
||||
return;
|
||||
}
|
||||
|
||||
switch (ipu_plane->dp_flow) {
|
||||
case IPU_DP_FLOW_SYNC_BG:
|
||||
ipu_dp_setup_channel(ipu_plane->dp,
|
||||
IPUV3_COLORSPACE_RGB,
|
||||
IPUV3_COLORSPACE_RGB);
|
||||
ipu_dp_set_global_alpha(ipu_plane->dp, true, 0, true);
|
||||
break;
|
||||
case IPU_DP_FLOW_SYNC_FG:
|
||||
ics = ipu_drm_fourcc_to_colorspace(state->fb->pixel_format);
|
||||
ipu_dp_setup_channel(ipu_plane->dp, ics,
|
||||
IPUV3_COLORSPACE_UNKNOWN);
|
||||
ipu_dp_set_window_pos(ipu_plane->dp, state->crtc_x,
|
||||
state->crtc_y);
|
||||
/* Enable local alpha on partial plane */
|
||||
switch (state->fb->pixel_format) {
|
||||
case DRM_FORMAT_ARGB1555:
|
||||
case DRM_FORMAT_ABGR1555:
|
||||
case DRM_FORMAT_RGBA5551:
|
||||
case DRM_FORMAT_BGRA5551:
|
||||
case DRM_FORMAT_ARGB4444:
|
||||
case DRM_FORMAT_ARGB8888:
|
||||
case DRM_FORMAT_ABGR8888:
|
||||
case DRM_FORMAT_RGBA8888:
|
||||
case DRM_FORMAT_BGRA8888:
|
||||
ipu_dp_set_global_alpha(ipu_plane->dp, false, 0, false);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
ipu_dmfc_config_wait4eot(ipu_plane->dmfc, state->crtc_w);
|
||||
|
||||
ipu_cpmem_zero(ipu_plane->ipu_ch);
|
||||
ipu_cpmem_set_resolution(ipu_plane->ipu_ch, state->src_w >> 16,
|
||||
state->src_h >> 16);
|
||||
ipu_cpmem_set_fmt(ipu_plane->ipu_ch, state->fb->pixel_format);
|
||||
ipu_cpmem_set_high_priority(ipu_plane->ipu_ch);
|
||||
ipu_idmac_set_double_buffer(ipu_plane->ipu_ch, 1);
|
||||
ipu_cpmem_set_stride(ipu_plane->ipu_ch, state->fb->pitches[0]);
|
||||
ipu_plane_atomic_set_base(ipu_plane, old_state);
|
||||
ipu_plane_enable(ipu_plane);
|
||||
}
|
||||
|
||||
static const struct drm_plane_helper_funcs ipu_plane_helper_funcs = {
|
||||
.atomic_check = ipu_plane_atomic_check,
|
||||
.atomic_disable = ipu_plane_atomic_disable,
|
||||
.atomic_update = ipu_plane_atomic_update,
|
||||
};
|
||||
|
||||
struct ipu_plane *ipu_plane_init(struct drm_device *dev, struct ipu_soc *ipu,
|
||||
int dma, int dp, unsigned int possible_crtcs,
|
||||
enum drm_plane_type type)
|
||||
@@ -481,5 +578,7 @@ struct ipu_plane *ipu_plane_init(struct drm_device *dev, struct ipu_soc *ipu,
|
||||
return ERR_PTR(ret);
|
||||
}
|
||||
|
||||
drm_plane_helper_add(&ipu_plane->base, &ipu_plane_helper_funcs);
|
||||
|
||||
return ipu_plane;
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user