Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC platform updates from Arnd Bergmann: "Newly added support for additional SoCs: - Axis Artpec-6 SoC family - Allwinner A83T SoC - Mediatek MT7623 - NXP i.MX6QP SoC - ST Microelectronics stm32f469 microcontroller New features: - SMP support for Mediatek mt2701 - Big-endian support for NXP i.MX - DaVinci now uses the new DMA engine dma_slave_map - OMAP now uses the new DMA engine dma_slave_map - earlyprintk support for palmchip uart on mach-tango - delay timer support for orion Other: - Exynos PMU driver moved out to drivers/soc/ - Various smaller updates for Renesas, Xilinx, PXA, AT91, OMAP, uniphier" * tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (83 commits) ARM: uniphier: rework SMP code to support new System Bus binding ARM: uniphier: add missing of_node_put() ARM: at91: avoid defining CONFIG_* symbols in source code ARM: DRA7: hwmod: Add data for eDMA tpcc, tptc0, tptc1 ARM: imx: Make reset_control_ops const ARM: imx: Do L2 errata only if the L2 cache isn't enabled ARM: imx: select ARM_CPU_SUSPEND only for imx6 dmaengine: pxa_dma: fix the maximum requestor line ARM: alpine: select the Alpine MSI controller driver ARM: pxa: add the number of DMA requestor lines dmaengine: mmp-pdma: add number of requestors dma: mmp_pdma: Add the #dma-requests DT property documentation ARM: OMAP2+: Add rtc hwmod configuration for ti81xx ARM: s3c24xx: Avoid warning for inb/outb ARM: zynq: Move early printk virtual address to vmalloc area ARM: DRA7: hwmod: Add custom reset handler for PCIeSS ARM: SAMSUNG: Remove unused register offset definition ARM: EXYNOS: Cleanup header files inclusion drivers: soc: samsung: Enable COMPILE_TEST MAINTAINERS: Add maintainers entry for drivers/soc/samsung ...
这个提交包含在:
@@ -297,7 +297,6 @@ config MACH_MAGICIAN
|
||||
|
||||
config MACH_MIOA701
|
||||
bool "Mitac Mio A701 Support"
|
||||
select GPIO_SYSFS
|
||||
select IWMMXT
|
||||
select PXA27x
|
||||
help
|
||||
@@ -529,7 +528,7 @@ config MACH_TOSA
|
||||
|
||||
config TOSA_BT
|
||||
tristate "Control the state of built-in bluetooth chip on Sharp SL-6000"
|
||||
depends on MACH_TOSA
|
||||
depends on MACH_TOSA && NET
|
||||
select RFKILL
|
||||
help
|
||||
This is a simple driver that is able to control
|
||||
|
@@ -1203,6 +1203,7 @@ void __init pxa2xx_set_spi_info(unsigned id, struct pxa2xx_spi_master *info)
|
||||
|
||||
static struct mmp_dma_platdata pxa_dma_pdata = {
|
||||
.dma_channels = 0,
|
||||
.nb_requestors = 0,
|
||||
};
|
||||
|
||||
static struct resource pxa_dma_resource[] = {
|
||||
@@ -1231,7 +1232,7 @@ static struct platform_device pxa2xx_pxa_dma = {
|
||||
.resource = pxa_dma_resource,
|
||||
};
|
||||
|
||||
void __init pxa2xx_set_dmac_info(int nb_channels)
|
||||
void __init pxa2xx_set_dmac_info(int nb_channels, int nb_requestors)
|
||||
{
|
||||
pxa_dma_pdata.dma_channels = nb_channels;
|
||||
pxa_register_device(&pxa2xx_pxa_dma, &pxa_dma_pdata);
|
||||
|
@@ -57,7 +57,7 @@ struct gpio_vbus_mach_info e7xx_udc_info = {
|
||||
.gpio_pullup_inverted = 1
|
||||
};
|
||||
|
||||
static struct platform_device e7xx_gpio_vbus = {
|
||||
static struct platform_device e7xx_gpio_vbus __maybe_unused = {
|
||||
.name = "gpio-vbus",
|
||||
.id = -1,
|
||||
.dev = {
|
||||
@@ -126,7 +126,7 @@ struct resource eseries_tmio_resources[] = {
|
||||
};
|
||||
|
||||
/* Some e-series hardware cannot control the 32K clock */
|
||||
static void __init eseries_register_clks(void)
|
||||
static void __init __maybe_unused eseries_register_clks(void)
|
||||
{
|
||||
clk_register_fixed_rate(NULL, "CLK_CK32K", NULL, CLK_IS_ROOT, 32768);
|
||||
}
|
||||
|
@@ -139,14 +139,14 @@ static void gumstix_setup_bt_clock(void)
|
||||
{
|
||||
int timeout = 500;
|
||||
|
||||
if (!(OSCC & OSCC_OOK))
|
||||
if (!(readl(OSCC) & OSCC_OOK))
|
||||
pr_warn("32kHz clock was not on. Bootloader may need to be updated\n");
|
||||
else
|
||||
return;
|
||||
|
||||
OSCC |= OSCC_OON;
|
||||
writel(readl(OSCC) | OSCC_OON, OSCC);
|
||||
do {
|
||||
if (OSCC & OSCC_OOK)
|
||||
if (readl(OSCC) & OSCC_OOK)
|
||||
break;
|
||||
udelay(1);
|
||||
} while (--timeout);
|
||||
|
@@ -134,10 +134,10 @@
|
||||
/*
|
||||
* PXA2xx specific Core clock definitions
|
||||
*/
|
||||
#define CCCR __REG(0x41300000) /* Core Clock Configuration Register */
|
||||
#define CCSR __REG(0x4130000C) /* Core Clock Status Register */
|
||||
#define CKEN __REG(0x41300004) /* Clock Enable Register */
|
||||
#define OSCC __REG(0x41300008) /* Oscillator Configuration Register */
|
||||
#define CCCR io_p2v(0x41300000) /* Core Clock Configuration Register */
|
||||
#define CCSR io_p2v(0x4130000C) /* Core Clock Status Register */
|
||||
#define CKEN io_p2v(0x41300004) /* Clock Enable Register */
|
||||
#define OSCC io_p2v(0x41300008) /* Oscillator Configuration Register */
|
||||
|
||||
#define CCCR_N_MASK 0x0380 /* Run Mode Frequency to Turbo Mode Frequency Multiplier */
|
||||
#define CCCR_M_MASK 0x0060 /* Memory Frequency to Run Mode Frequency Multiplier */
|
||||
|
@@ -18,7 +18,7 @@
|
||||
/*
|
||||
* Oscillator Configuration Register (OSCC)
|
||||
*/
|
||||
#define OSCC __REG(0x41350000) /* Oscillator Configuration Register */
|
||||
#define OSCC io_p2v(0x41350000) /* Oscillator Configuration Register */
|
||||
|
||||
#define OSCC_PEN (1 << 11) /* 13MHz POUT */
|
||||
|
||||
|
@@ -29,6 +29,9 @@ extern int pxa_pm_enter(suspend_state_t state);
|
||||
extern int pxa_pm_prepare(void);
|
||||
extern void pxa_pm_finish(void);
|
||||
|
||||
extern const char pm_enter_standby_start[], pm_enter_standby_end[];
|
||||
extern int pxa3xx_finish_suspend(unsigned long);
|
||||
|
||||
/* NOTE: this is for PM debugging on Lubbock, it's really a big
|
||||
* ugly, but let's keep the crap minimum here, instead of direct
|
||||
* accessing the LUBBOCK CPLD registers in arch/arm/mach-pxa/pm.c
|
||||
|
@@ -19,42 +19,18 @@
|
||||
#include "generic.h"
|
||||
|
||||
#ifdef CONFIG_PXA3xx
|
||||
static const struct of_dev_auxdata const pxa3xx_auxdata_lookup[] __initconst = {
|
||||
OF_DEV_AUXDATA("mrvl,pxa-uart", 0x40100000, "pxa2xx-uart.0", NULL),
|
||||
OF_DEV_AUXDATA("mrvl,pxa-uart", 0x40200000, "pxa2xx-uart.1", NULL),
|
||||
OF_DEV_AUXDATA("mrvl,pxa-uart", 0x40700000, "pxa2xx-uart.2", NULL),
|
||||
OF_DEV_AUXDATA("mrvl,pxa-uart", 0x41600000, "pxa2xx-uart.3", NULL),
|
||||
OF_DEV_AUXDATA("marvell,pxa-mmc", 0x41100000, "pxa2xx-mci.0", NULL),
|
||||
OF_DEV_AUXDATA("intel,pxa3xx-gpio", 0x40e00000, "pxa3xx-gpio", NULL),
|
||||
OF_DEV_AUXDATA("marvell,pxa-ohci", 0x4c000000, "pxa27x-ohci", NULL),
|
||||
OF_DEV_AUXDATA("mrvl,pxa-i2c", 0x40301680, "pxa2xx-i2c.0", NULL),
|
||||
OF_DEV_AUXDATA("mrvl,pwri2c", 0x40f500c0, "pxa3xx-i2c.1", NULL),
|
||||
OF_DEV_AUXDATA("marvell,pxa3xx-nand", 0x43100000, "pxa3xx-nand", NULL),
|
||||
{}
|
||||
};
|
||||
|
||||
static void __init pxa3xx_dt_init(void)
|
||||
{
|
||||
of_platform_populate(NULL, of_default_bus_match_table,
|
||||
pxa3xx_auxdata_lookup, NULL);
|
||||
}
|
||||
|
||||
static const char *const pxa3xx_dt_board_compat[] __initconst = {
|
||||
"marvell,pxa300",
|
||||
"marvell,pxa310",
|
||||
"marvell,pxa320",
|
||||
NULL,
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PXA3xx
|
||||
DT_MACHINE_START(PXA_DT, "Marvell PXA3xx (Device Tree Support)")
|
||||
.map_io = pxa3xx_map_io,
|
||||
.init_irq = pxa3xx_dt_init_irq,
|
||||
.handle_irq = pxa3xx_handle_irq,
|
||||
.init_time = pxa_timer_init,
|
||||
.restart = pxa_restart,
|
||||
.init_machine = pxa3xx_dt_init,
|
||||
.dt_compat = pxa3xx_dt_board_compat,
|
||||
MACHINE_END
|
||||
#endif
|
||||
|
@@ -206,7 +206,7 @@ static int __init pxa25x_init(void)
|
||||
register_syscore_ops(&pxa_irq_syscore_ops);
|
||||
register_syscore_ops(&pxa2xx_mfp_syscore_ops);
|
||||
|
||||
pxa2xx_set_dmac_info(16);
|
||||
pxa2xx_set_dmac_info(16, 40);
|
||||
pxa_register_device(&pxa25x_device_gpio, &pxa25x_gpio_info);
|
||||
ret = platform_add_devices(pxa25x_devices,
|
||||
ARRAY_SIZE(pxa25x_devices));
|
||||
|
@@ -132,7 +132,8 @@ void pxa27x_cpu_pm_enter(suspend_state_t state)
|
||||
#ifndef CONFIG_IWMMXT
|
||||
u64 acc0;
|
||||
|
||||
asm volatile("mra %Q0, %R0, acc0" : "=r" (acc0));
|
||||
asm volatile(".arch_extension xscale\n\t"
|
||||
"mra %Q0, %R0, acc0" : "=r" (acc0));
|
||||
#endif
|
||||
|
||||
/* ensure voltage-change sequencer not initiated, which hangs */
|
||||
@@ -151,7 +152,8 @@ void pxa27x_cpu_pm_enter(suspend_state_t state)
|
||||
case PM_SUSPEND_MEM:
|
||||
cpu_suspend(pwrmode, pxa27x_finish_suspend);
|
||||
#ifndef CONFIG_IWMMXT
|
||||
asm volatile("mar acc0, %Q0, %R0" : "=r" (acc0));
|
||||
asm volatile(".arch_extension xscale\n\t"
|
||||
"mar acc0, %Q0, %R0" : "=r" (acc0));
|
||||
#endif
|
||||
break;
|
||||
}
|
||||
@@ -309,7 +311,7 @@ static int __init pxa27x_init(void)
|
||||
if (!of_have_populated_dt()) {
|
||||
pxa_register_device(&pxa27x_device_gpio,
|
||||
&pxa27x_gpio_info);
|
||||
pxa2xx_set_dmac_info(32);
|
||||
pxa2xx_set_dmac_info(32, 75);
|
||||
ret = platform_add_devices(devices,
|
||||
ARRAY_SIZE(devices));
|
||||
}
|
||||
|
@@ -68,7 +68,6 @@ static unsigned long wakeup_src;
|
||||
*/
|
||||
static void pxa3xx_cpu_standby(unsigned int pwrmode)
|
||||
{
|
||||
extern const char pm_enter_standby_start[], pm_enter_standby_end[];
|
||||
void (*fn)(unsigned int) = (void __force *)(sram + 0x8000);
|
||||
|
||||
memcpy_toio(sram + 0x8000, pm_enter_standby_start,
|
||||
@@ -103,11 +102,10 @@ static void pxa3xx_cpu_pm_suspend(void)
|
||||
#ifndef CONFIG_IWMMXT
|
||||
u64 acc0;
|
||||
|
||||
asm volatile("mra %Q0, %R0, acc0" : "=r" (acc0));
|
||||
asm volatile(".arch_extension xscale\n\t"
|
||||
"mra %Q0, %R0, acc0" : "=r" (acc0));
|
||||
#endif
|
||||
|
||||
extern int pxa3xx_finish_suspend(unsigned long);
|
||||
|
||||
/* resuming from D2 requires the HSIO2/BOOT/TPM clocks enabled */
|
||||
CKENA |= (1 << CKEN_BOOT) | (1 << CKEN_TPM);
|
||||
CKENB |= 1 << (CKEN_HSIO2 & 0x1f);
|
||||
@@ -133,7 +131,8 @@ static void pxa3xx_cpu_pm_suspend(void)
|
||||
AD3ER = 0;
|
||||
|
||||
#ifndef CONFIG_IWMMXT
|
||||
asm volatile("mar acc0, %Q0, %R0" : "=r" (acc0));
|
||||
asm volatile(".arch_extension xscale\n\t"
|
||||
"mar acc0, %Q0, %R0" : "=r" (acc0));
|
||||
#endif
|
||||
}
|
||||
|
||||
@@ -450,7 +449,7 @@ static int __init pxa3xx_init(void)
|
||||
if (of_have_populated_dt())
|
||||
return 0;
|
||||
|
||||
pxa2xx_set_dmac_info(32);
|
||||
pxa2xx_set_dmac_info(32, 100);
|
||||
ret = platform_add_devices(devices, ARRAY_SIZE(devices));
|
||||
if (ret)
|
||||
return ret;
|
||||
|
@@ -201,7 +201,7 @@ static void __init spitz_scoop_init(void)
|
||||
}
|
||||
|
||||
/* Power control is shared with between one of the CF slots and SD */
|
||||
static void spitz_card_pwr_ctrl(uint8_t enable, uint8_t new_cpr)
|
||||
static void __maybe_unused spitz_card_pwr_ctrl(uint8_t enable, uint8_t new_cpr)
|
||||
{
|
||||
unsigned short cpr;
|
||||
unsigned long flags;
|
||||
|
@@ -910,7 +910,7 @@ static void __init zeus_map_io(void)
|
||||
PMCR = PSPR = 0;
|
||||
|
||||
/* enable internal 32.768Khz oscillator (ignore OSCC_OOK) */
|
||||
OSCC |= OSCC_OON;
|
||||
writel(readl(OSCC) | OSCC_OON, OSCC);
|
||||
|
||||
/* Some clock cycles later (from OSCC_ON), programme PCFR (OPDE...).
|
||||
* float chip selects and PCMCIA */
|
||||
|
在新工单中引用
屏蔽一个用户