ARM: tegra: update DT files to add reset properties

An earlier patch updated the Tegra DT bindings to require resets and
reset-names properties to be filled in. This patch updates the DT files
to include those properties.

Note that any legacy clocks and clock-names entries that are replaced by
reset properties are not yet removed; the drivers must be updated to use
the new resets and reset-names properties first.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
This commit is contained in:
Stephen Warren
2013-11-06 14:01:16 -07:00
vanhempi ed520c90b3
commit 3393d42205
4 muutettua tiedostoa jossa 266 lisäystä ja 4 poistoa

Näytä tiedosto

@@ -43,6 +43,7 @@
compatible = "nvidia,tegra114-car";
reg = <0x60006000 0x1000>;
#clock-cells = <1>;
#reset-cells = <1>;
};
apbdma: dma {
@@ -81,6 +82,8 @@
<GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA114_CLK_APBDMA>;
resets = <&tegra_car 34>;
reset-names = "dma";
};
ahb: ahb {
@@ -125,8 +128,10 @@
reg-shift = <2>;
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
nvidia,dma-request-selector = <&apbdma 8>;
status = "disabled";
clocks = <&tegra_car TEGRA114_CLK_UARTA>;
resets = <&tegra_car 6>;
reset-names = "serial";
status = "disabled";
};
uartb: serial@70006040 {
@@ -135,8 +140,10 @@
reg-shift = <2>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
nvidia,dma-request-selector = <&apbdma 9>;
status = "disabled";
clocks = <&tegra_car TEGRA114_CLK_UARTB>;
resets = <&tegra_car 7>;
reset-names = "serial";
status = "disabled";
};
uartc: serial@70006200 {
@@ -145,8 +152,10 @@
reg-shift = <2>;
interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
nvidia,dma-request-selector = <&apbdma 10>;
status = "disabled";
clocks = <&tegra_car TEGRA114_CLK_UARTC>;
resets = <&tegra_car 55>;
reset-names = "serial";
status = "disabled";
};
uartd: serial@70006300 {
@@ -155,8 +164,10 @@
reg-shift = <2>;
interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
nvidia,dma-request-selector = <&apbdma 19>;
status = "disabled";
clocks = <&tegra_car TEGRA114_CLK_UARTD>;
resets = <&tegra_car 65>;
reset-names = "serial";
status = "disabled";
};
pwm: pwm {
@@ -164,6 +175,8 @@
reg = <0x7000a000 0x100>;
#pwm-cells = <2>;
clocks = <&tegra_car TEGRA114_CLK_PWM>;
resets = <&tegra_car 17>;
reset-names = "pwm";
status = "disabled";
};
@@ -175,6 +188,8 @@
#size-cells = <0>;
clocks = <&tegra_car TEGRA114_CLK_I2C1>;
clock-names = "div-clk";
resets = <&tegra_car 12>;
reset-names = "i2c";
status = "disabled";
};
@@ -186,6 +201,8 @@
#size-cells = <0>;
clocks = <&tegra_car TEGRA114_CLK_I2C2>;
clock-names = "div-clk";
resets = <&tegra_car 54>;
reset-names = "i2c";
status = "disabled";
};
@@ -197,6 +214,8 @@
#size-cells = <0>;
clocks = <&tegra_car TEGRA114_CLK_I2C3>;
clock-names = "div-clk";
resets = <&tegra_car 67>;
reset-names = "i2c";
status = "disabled";
};
@@ -208,6 +227,8 @@
#size-cells = <0>;
clocks = <&tegra_car TEGRA114_CLK_I2C4>;
clock-names = "div-clk";
resets = <&tegra_car 103>;
reset-names = "i2c";
status = "disabled";
};
@@ -219,6 +240,8 @@
#size-cells = <0>;
clocks = <&tegra_car TEGRA114_CLK_I2C5>;
clock-names = "div-clk";
resets = <&tegra_car 47>;
reset-names = "i2c";
status = "disabled";
};
@@ -231,6 +254,8 @@
#size-cells = <0>;
clocks = <&tegra_car TEGRA114_CLK_SBC1>;
clock-names = "spi";
resets = <&tegra_car 41>;
reset-names = "spi";
status = "disabled";
};
@@ -243,6 +268,8 @@
#size-cells = <0>;
clocks = <&tegra_car TEGRA114_CLK_SBC2>;
clock-names = "spi";
resets = <&tegra_car 44>;
reset-names = "spi";
status = "disabled";
};
@@ -255,6 +282,8 @@
#size-cells = <0>;
clocks = <&tegra_car TEGRA114_CLK_SBC3>;
clock-names = "spi";
resets = <&tegra_car 46>;
reset-names = "spi";
status = "disabled";
};
@@ -267,6 +296,8 @@
#size-cells = <0>;
clocks = <&tegra_car TEGRA114_CLK_SBC4>;
clock-names = "spi";
resets = <&tegra_car 68>;
reset-names = "spi";
status = "disabled";
};
@@ -279,6 +310,8 @@
#size-cells = <0>;
clocks = <&tegra_car TEGRA114_CLK_SBC5>;
clock-names = "spi";
resets = <&tegra_car 104>;
reset-names = "spi";
status = "disabled";
};
@@ -291,6 +324,8 @@
#size-cells = <0>;
clocks = <&tegra_car TEGRA114_CLK_SBC6>;
clock-names = "spi";
resets = <&tegra_car 105>;
reset-names = "spi";
status = "disabled";
};
@@ -306,6 +341,8 @@
reg = <0x7000e200 0x100>;
interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA114_CLK_KBC>;
resets = <&tegra_car 36>;
reset-names = "kbc";
status = "disabled";
};
@@ -353,6 +390,22 @@
clock-names = "d_audio", "apbif", "i2s0", "i2s1", "i2s2",
"i2s3", "i2s4", "dam0", "dam1", "dam2",
"spdif_in", "amx", "adx";
resets = <&tegra_car 106>, /* d_audio */
<&tegra_car 107>, /* apbif */
<&tegra_car 30>, /* i2s0 */
<&tegra_car 11>, /* i2s1 */
<&tegra_car 18>, /* i2s2 */
<&tegra_car 101>, /* i2s3 */
<&tegra_car 102>, /* i2s4 */
<&tegra_car 108>, /* dam0 */
<&tegra_car 109>, /* dam1 */
<&tegra_car 110>, /* dam2 */
<&tegra_car 10>, /* spdif */
<&tegra_car 153>, /* amx */
<&tegra_car 154>; /* adx */
reset-names = "d_audio", "apbif", "i2s0", "i2s1", "i2s2",
"i2s3", "i2s4", "dam0", "dam1", "dam2",
"spdif", "amx", "adx";
ranges;
#address-cells = <1>;
#size-cells = <1>;
@@ -362,6 +415,8 @@
reg = <0x70080300 0x100>;
nvidia,ahub-cif-ids = <4 4>;
clocks = <&tegra_car TEGRA114_CLK_I2S0>;
resets = <&tegra_car 30>;
reset-names = "i2s";
status = "disabled";
};
@@ -370,6 +425,8 @@
reg = <0x70080400 0x100>;
nvidia,ahub-cif-ids = <5 5>;
clocks = <&tegra_car TEGRA114_CLK_I2S1>;
resets = <&tegra_car 11>;
reset-names = "i2s";
status = "disabled";
};
@@ -378,6 +435,8 @@
reg = <0x70080500 0x100>;
nvidia,ahub-cif-ids = <6 6>;
clocks = <&tegra_car TEGRA114_CLK_I2S2>;
resets = <&tegra_car 18>;
reset-names = "i2s";
status = "disabled";
};
@@ -386,6 +445,8 @@
reg = <0x70080600 0x100>;
nvidia,ahub-cif-ids = <7 7>;
clocks = <&tegra_car TEGRA114_CLK_I2S3>;
resets = <&tegra_car 101>;
reset-names = "i2s";
status = "disabled";
};
@@ -394,6 +455,8 @@
reg = <0x70080700 0x100>;
nvidia,ahub-cif-ids = <8 8>;
clocks = <&tegra_car TEGRA114_CLK_I2S4>;
resets = <&tegra_car 102>;
reset-names = "i2s";
status = "disabled";
};
};
@@ -403,6 +466,8 @@
reg = <0x78000000 0x200>;
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA114_CLK_SDMMC1>;
resets = <&tegra_car 14>;
reset-names = "sdhci";
status = "disable";
};
@@ -411,6 +476,8 @@
reg = <0x78000200 0x200>;
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA114_CLK_SDMMC2>;
resets = <&tegra_car 9>;
reset-names = "sdhci";
status = "disable";
};
@@ -419,6 +486,8 @@
reg = <0x78000400 0x200>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA114_CLK_SDMMC3>;
resets = <&tegra_car 69>;
reset-names = "sdhci";
status = "disable";
};
@@ -427,6 +496,8 @@
reg = <0x78000600 0x200>;
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA114_CLK_SDMMC4>;
resets = <&tegra_car 15>;
reset-names = "sdhci";
status = "disable";
};
@@ -436,6 +507,8 @@
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
phy_type = "utmi";
clocks = <&tegra_car TEGRA114_CLK_USBD>;
resets = <&tegra_car 22>;
reset-names = "usb";
nvidia,phy = <&phy1>;
status = "disabled";
};
@@ -467,6 +540,8 @@
interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
phy_type = "utmi";
clocks = <&tegra_car TEGRA114_CLK_USB3>;
resets = <&tegra_car 59>;
reset-names = "usb";
nvidia,phy = <&phy3>;
status = "disabled";
};